CircuiTree - January 2009 - (Page 20) New Capability for HDI Microvia Defect Detection Mark Swart and Dave Wilkie Today’s Challenge Certain failure modes of high density interconnect (HDI) blind or buried microvias are difficult to detect. These vias consist of laser-drilled holes that are subsequently plated with a thin layer of copper such that the plated hole connects signal traces from different substrate layers. The range of manufacturing processes used to create HDI substrates share the requirement that solid process controls are crucial to cost-effective manufacture. Unfortunately, existing test methods may not provide sufficient immediate feedback to the process. An alarming portion of failures are not reliably detected with existing test and inspection methods or may be detected only after panels are fully complete. Late detection limits the opportunity to adjust the process before additional defective product is manufactured. Existing final electrical test methods exert considerable force upon the substrate and may mask intermittent connections, leading to field failure and increased financial risk. For many major HDI substrate manufacturers, problems with defects and latent defects in HDI vias are a major point of concern. Some have added thermal cycles ahead of final electrical test to increase the range of defects detected. Growing demand for HDI substrates and higher interconnect density on these substrates has increased this exposure to scrap loss, test escape, latent failure, and attendant high compensatory and rework costs. This article presents a novel inspection method that substantially reduces the risk of such escapes or latent failures. The method is placed earlier in the manufacturing flow than traditional electrical test and improves real-time process control feedback to minimize the production of defective panels. The method is applicable to all HDI manufacturing processes. Examples of Defect Types Case 1: Large Void The properly formed via of Figure 1 contrasts with the example of Figure 2 where a large barrel plating void results in a missing connection between layers. The void is large enough that the connection is completely open and remains so. This type of failure should be caught during final electrical test and should not reach assembly or the field. But final electrical test is at the very end of the manufacturing process and leaves little opportunity for process control feedback. Detection of a rising population of such defects at final test occurs only after far too many additional bad panels have been made. Automatic optical inspection (AOI) is a mid-process inspection step commonly used to visually inspect inner layers prior to lamination and may also be used to visually inspect the outer surface of laminated substrates. But because AOI is a surface inspec- Figure 1 Properly Formed Via 20 January 2009 • circuitree.com Figure 2 Void Results in Continuously Open Connection From Initial Substrate Manufacture Onward. Not Detected at AOI but Generally Detectable at Final Test Figure 3 Small Void or Crack Results in Intermittent Electrical Connection That Is Easily Influenced By Thermal and Mechanical Conditions http://www.circuitree.com
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