EE Times - August 6, 2007 - (Page Cover3) ADVERTORIAL DesignPerspective Designing for High-Performance, Low-Power Applications. What is the Stratix III device family? Altera’s new 65-nm Stratix® III device family offers the industry’s lowest-power highperformance FPGAs. Extending the success of the Stratix series, Stratix III FPGAs combine high density, high performance, and a rich feature set with a unique power management capability. You can integrate more functions, maximize system performance and still meet your power budget. To meet diverse application needs, Stratix III FPGAs now offer: • 25% higher performance and 50% less power consumption than previous-generation devices • At least one speed grade faster than competing devices • An internal clock speed of up to 600 MHz What’s new and unique for the Stratix III family? Stratix III devices are the only high-performance FPGAs available with programmable power technology that allows you to manage power consumption according to your requirements, while still maximizing performance. To do that, Altera co-developed both the silicon and software, giving customers the ability to meet their design targets. Stratix III FPGAs provide a number of key power innovations: • Programmable Power Technology—Every programmable logic array block (LAB), DSP block, and memory consumes just the power needed • Selectable Core Voltage—Provides the option of using 1.1 V or 0.9 V core voltage • Quartus® II PowerPlay Power Optimization— Automatically minimizes total power consumption and supplies accurate power estimation and reporting How fast are Stratix III devices? Stratix III FPGAs average a full speed grade faster than competing 65-nm devices, based on an industry-endorsed performance benchmarking methodology and using a set of real customer EP3SE2601 101,760 254,400 203,520 864 48 14,688 3,180 768 Note: 1 EP3SE260 FPGAs are the optimum solution for both logic (Stratix III Logic) and DSP/memory (Stratix III Enhanced) applications at this density. designs. Stratix III devices are also 25% faster than the fastest Altera® 90-nm devices, and are the only FPGAs able to support DDR3 and QDR2+ at 400 MHz. See www.altera.com for Stratix III performance details. How do I start a Stratix III design? You can begin designing now with the Stratix III family using Quartus II software version 6.1. It’s easy to use, with feature-rich synthesis and simulation tools to take full advantage of Stratix III performance and design benefits. To deliver maximum productivity benefits, Quartus II software offers the industry’s first incremental compilation feature, plus advanced timing analysis and team-based design support. Quartus II software, which also supports Stratix II and Stratix II GX devices, Table 1. Stratix III Family Plan Device EP3SL50 EP3SL70 EP3SL110 Stratix III EP3SL150 Logic EP3SL200 EP3SE2601 EP3SL340 EP3SE50 Stratix III EP3SE80 Enhanced EP3SE110 ALMs 19, 000 27,000 42,600 56,800 79,560 101,760 135,200 19,000 32,000 42,600 Equiv. LEs 47,500 67,500 106,500 142,000 198,900 254,400 338,000 47,500 80,000 106,500 Reg. 38,000 54,000 85,200 113,600 159,120 203,520 270,400 38,000 64,000 85,200 reduces design iteration times by up to 70 percent compared to traditional high-density FPGA design flows. Seamless integration with all leading thirdparty tools results in a single, unified design environment that enables the highest level of productivity and the fastest path to design completion for high-density FPGA designs Do Stratix III FPGAs ensure design security? Stratix III design security protects designs from copying and tampering by competitors or nefarious forces. Stratix III devices are the industry’s first FPGAs to support configuration bitstream encryption using the Advanced Encryption Standard (AES), the most advanced encryption algorithm available today, and a 256-bit key with the option of volatile or nonvolatile on-chip storage. Embedded Memory (Kbits) 1,836 2,214 4,203 5,499 7,668 14,688 17,208 5,328 6,183 8,055 Max. 18 x 18 Multipliers (Sum of Mult.) 216 288 288 384 576 768 576 384 672 896 M9K Blocks 108 150 275 355 468 864 1,144 400 495 639 M144K Blocks 6 6 12 16 24 48 48 12 12 16 MLAB (Kbits) 594 844 1,331 1,775 2,468 3,180 4,225 594 1,000 1,331 http://www.altera.com
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