Embedded Systems Design Europe - February 2008 - (Page 21)

feature are similar to software, ﬁrmware designers should follow some of software development rules. HDL GUIDELINES 1. Use comments to provide code clarity. 2. Indicate active low signals by n, _n, _b, *at the end of the name. 3. Signal names should be relatively short but descriptive. For example: • • • • • A good signal name would be CEn for an active low chip enable. A bad signal name would be active_low_chip_enable. Use underscores in name description for clarity. Synchronize signals to change on a clock edge. Process, routes, modules, and so forth, should perform a single function. Use formatting, such as tabs and spaces, to provide readability of code. Include a header section for each file or module. Suggestive header information designer’s name, file description, and revision or history record. • • • • VHDL is not case sensitive. No specific format is required. Reserved words aren’t valid signal names. Signal names must start with a letter; numbers are not acceptable. PC/104-Plus with Intel® Pentium® M Processor Module • LIBRARY DECLARATION The library declaration is the ﬁrst section in the source ﬁle. This is where you place the library and package call-out statements. Libraries and packages deﬁne and store components, deﬁne signal types, functions, procedures, and so forth. Packages and libraries are standardized, such as the IEEE library, and deﬁned by a user (designer) or vendor. The IEEE library offers several packages, such as standard, textio, and std_logic_1164. Each of these packages deﬁnes various types, attributes, procedures, ﬁles, and so on. Here’s an abbreviated list of selected IEEE packages: • standard defines types (such as boolean, bit, time, and integer), subtypes (such as natural and positive), and the attribute foreign. textio package defines types (such as line and text), files (such as input and output), and procedures (such as read, readline write, and writeline). Std_logic_1164 package defines types (such as std_ulogic and std_ulogic_vector) and functions (such as nand, and, or, nor). MICROSPACE® MSM855-xxx _ PC/104 Basis Board with a user-deﬁned, scalable SM855 CPU-Module _ Intel® Celeron® M / Pentium® M processor, 600MHz to 1.8GHz _ 256MB to 1GByte DDR-DRAM _ 5x USB V2.0, 2x COM, LPT1, FD, E-IDE, LPT1, KB, MS _ LAN Ethernet 10/100Base-T _ Intel® Extreme Graphics, 64MB UMA _ CRT and DVO/LVDS, two identical or two different pictures _ AC97 SPDif 5.1 Sound _ intelligent cooling concept _ Operatingtemp. -25°C to +70°C _ Options: PC/104-Plus PCI interface CompactFlash DVI-D converter Cable-Kit Operatingtemp. -40°C to +70C° • • VHDL SYNTAX RULES Now for some VHDL speciﬁcs, including data types: • Std_logic can have values of high 1, low 0, unknown X, uninitialized U, high impedance Z, weak unknown W, weak 0 L, weak 1 H, and don’t care - to represent a single data bit. Std_logic_vector can have the same values as Std_logic; however it represents multiple bits. A bit can only have a value of high 1 or low 0, and it represents one data bit. Boolean represents true or false. Comments are denoted by double dash marks Comments continue after -- until a carriage return. Each statement ends with a semicolon ; . • • • • • • • The work library serves as a place to add or delete designs. Designs stored in the work library get analyzed during synthesis and simulation. Various tools handle libraries in different ways. Therefore, users should consult the tool’s documentation for correct use. To use what’s in a library or package, the library must be made visible by using the keywords Library and Use clause. The IEEE std_logic_1164 package contains the types used in Listing 1. Therefore, the LIBRARY IEEE; statement makes it visible and USE IEEE.std_logic_ 1164.all; tells the tools to use all the contents in the std_logic_1164 package. When a designer has speciﬁc con- .0, Boo Hall 12 DIGITAL-LOGIC offers a large variety of Embedded Computer in PC/104, EPIC, EBX, 3.5", smartModule and other form factors. th 336 www.digitallogic.com www.embedded.com/europe | embedded systems design europe | JANUARY – FEBRUARY 2008 21 018-019-020-021-022-023-024-025-21 21 7/02/08 11:27:44 http://www.digitallogic.com http://www.embedded.com/europe

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Embedded Systems Design Europe - February 2008 Contents ARTEMIS and ENIAC Get Parlimentary Approval Product Teardown Videos Come On Screen Esterel and Abslnt Integrate Products Microsoft Opens Windows to Networked Embedded Applications Trango Embeds Virtualization Tool in Cavium's Multicore CPUs MindTree - ADI Develop Security DVR Platform NXP Extends Deal with ARM to Cover MCUs Automotive and Embedded to Dominate DATE 08 ZigBee Spec Gets Smart On Energy Updated Card Spec Provides for Power-On Boot The Basics of Embedded Multitasking On a PIC Cover Feature: The Art of FPGA Construction Is Symmetric Multiprocessing For You? Accelerating MATLAB Using MEX-Files ARM Provides the Microcontroller Solution Embedded World Advertising Contracts

Embedded Systems Design Europe - February 2008

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