Embedded Systems Design Europe - April 2008 - (Page 12)

news Xilinx completes Virtex-5 line-up Xilinx Inc. has the ﬁnal part of its Virtex-5 family available for general sampling. The Vitex-5 FXT FPGAs have one or two embedded PowerPC 440 processor blocks, high-speed RocketIO GTX transceivers and dedicated XtremeDSP processing capabilities. This fourth platform in the 65nm Virtex-5 family provides what Xilinx describes as the ‘ultimate system integration platform’ for applications including wired and wireless communications, audio/video broadcast equipment, military, aerospace, and industrial systems. According to Per Holmberg, director of worldwide marketing and sales mobilization at Xilinx it started shipping samples of the FXT variant last November with over 1000 devices already having been shipped to over 150 early access customers. Each PowerPC 440 processor has integrated 32kbyte instruction and 32kbyte data caches and delivers up to 1,100 DMIPS at 550 MHz. Tightly coupled to these PC440 blocks is an integrated 5 x 2 cross bar processor interconnect architecture that provides simultaneous access to I/O and memory. This interconnect architecture includes dedicated master and slave processor local bus interfaces, four DMA ports with separate transmit and receive channels, and a dedicated memory bus interface enabling high-performance, low latency point-to-point connectivity. The advanced processor local bus (PLB) architecture maximises data transfers between the processor, crossbar and soft IP logic with highthroughput 128-bit interfaces to help minimise system bottlenecks. The auxiliary processor control Unit (APU) provides added connectivity for dedicated co-processing engines or custom user deﬁned instructions in applications such as video processing, 3D data processing and ﬂoating-point math. 12 The PowerPC440 block in Virtex-5 FXT is supported by industry standard operating systems including Wind River Systems, Green Hills, and other key embedded OS providers. Linux support is provided through MontaVista, Wind River Systems with others soon to be added. To increase I/O bandwidth, the Virtex-5 FXT platform includes low-power RocketIO GTX transceivers capable of supporting data rates from 500 Mbps to 6.5Gbps. Customers can design ap- plications supporting standards such as XAUI, Fibre Channel, SONET, Serial RapidIO, PCI Express 1.1 and 2.0, Interlaken, and others. Consuming less than 200mW typical power per channel at 6.5Gbps, the GTX transceivers include 4-tap DFE receiver equalization in addition to linear equalization and transmit pre-emphasis to improve signal integrity at higher line rates. The transceiver blocks also include a multi-code physical coding sublayer to support both 64B/66B and 64B/67B encoding/decoding schemes saving thousands of logic cells for each channel. The Virtex-5 FXT platform includes up to 384 DSP slices and 16.5 Mbyte of internal memory that can be conﬁgured to provide over 190 GMACs of DSP processing performance and 92 tera-bits/sec of memory bandwidth respectively at 500 MHz. Xilinx says this balance of hardware resources maximises the performance for com- putation-intensive applications typical of DSP and video applications. The DSP48E slice supports over 40 dynamically controlled operating modes including: multiplier, multiplier-accumulator, multipler-adder/subtractor, tree input adder, barrel shifter, wide counters and comparators. The Virtex-5 FXT FPGA platform is supported by the new ISE Design Suite 10.1 development tools which was announced March 24. This includes ISE Foundation, embedded development kit, system generator for DSP, AccelDSP synthesis tool, ChipScope Pro and ChipScope Pro serial I/O Toolkit, PlanAhead design and analysis tool and ISE simulator. Virtex-5 FXT FPGA samples are now shipping for the FX30T and FX70T devices. The remaining FX100T, FX130T and FX200T devices will be available over the next six months with the ﬁrst production devices scheduled to be made available in the third quarter of 2008. The four domain-optimized platforms – LX, LXT, SXT, and FXT – provide a range of devices that enable engineers to cost-effectively implement electronics systems by selecting an FPGA that incorporates the optimal mix of resources for their particular design: logic, I/O, and hardened IP blocks for logic-intensive, embedded processing, digital signal processing (DSP), and serial connectivity applications. Of the 24 devices in the Virtex-5 family, 15 are in production with the rest sampling. Cross-platform pin compatibility enables customers who have designs targeting Virtex-5 LXT and SXT devices to migrate their designs to Virtex-5 FXT devices in order to take advantage of the higher-performance embedded processing and serial connectivity. For a more detailed review of the 5-FXT including reference designs see: www.eetimes.eu/embedded/207000903. APRIL 2008 | embedded systems design europe | www.embedded.com/europe 012_ESDE.indd 12 10/04/08 14:00:06 http://www.eetimes.eu/embedded/207000903 http://www.embedded.com/europe

Table of Contents Feed for the Digital Edition of Embedded Systems Design Europe - April 2008

Embedded Systems Design Europe - April 2008 Contents Chip Industry Confronts 'Software' Gap Wind River's VxWorks OS Part of the nEUROn UCAV Demonstrator iSuppli Cuts Electronic Equipment Forecast Study Says GigE Vision Not Mature Chip Aids Wireless Health Monitoring Kontron Reports Strong Financial Growth Xilinx Completes Virtex-5 Line-Up French Project Builds Open Platform Home Automation Group Uses Enocean Radio Layer MIPs Adds Multi-Core Option to Portfolio Cover Feature: Next Gen Programmable Chips: Why Can't Hardware Be More Like Software? Improving Productivity & Quality With Domain-Specific Modeling Efficient CRC Calculation With Minimal Memory Footprint Do-It-Yourself Linux Embedded Development Tools Hardware/Software Verification Enters the Atomic Age New Products Advertising Contacts

Embedded Systems Design Europe - April 2008

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