Embedded Systems Design Europe - May 2008 - (Page 23)

PCI Express designs as a surprise error event, is a transaction for which the initiator can or will inform the target, but for which the initiator doesn’t expect a return message; the initiator might no longer be functional so as to accept any possible return message. Similarly, a transaction for which the user simply wants to deposit information, such as a write to memory, doesn’t require a system response. Today’s memory systems are very robust; if the integrity of the packet presented to the memory device can be guaranteed, there is little need to read it back for comparison. (Note that PCI Express provides a separate mechanism, called a replay buffer, which ensures safe link-to-link TLP navigation.) Hence, writing to memory requires trafﬁc ﬂow in one direction, with no requirement for a return action. NON-POSTED TRANSACTIONS In contrast, a posted transaction is one that requires a response by the recipient. A memory read is a request for a return of information. TLPs ﬂow in both directions; the initiator ﬁrst issues a read request and the memory then returns the requested information. The completer is obligated to “complete” the request. Interestingly, a read completion can be with or without data, depending on the request. As noted in Table 1, two basic types of transactions perform system reads or writes: memory cycles or IO cycles. The use of IO cycles has a history in legacy (conventional PCI) devices. Conceptually IO reads and writes are targeted at registers typically within an IO device. An IO write will load a value within a register, then return a completion conﬁrming delivery. IO writes are implicitly atomic The standard type of system read and write cycles allowable in PCI Express. Transaction type Posted or non-posted Memory read Memory write IO read IO write Configuration read Configuration write Memory read lock Message Table 1 www.embedded.com/europe | embedded systems design europe | MAY 2008 Non-posted Posted Non-posted Non-posted Non-posted Non-posted Non-posted Posted 23 http://www.embedded.com/europe

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Embedded Systems Design Europe - May 2008 Contents Microsoft Provides Embedded Roadmap Enea Buys Developers Irish Start-Up Raises Funds for Telecom FPGAs Kontron Promotes COM Express Nano Mentor Nucleus Platform Provides UI for Atmel Small Form Factor Boards Head for the SUMIT Proffibus Advances IO-Link Integration Embedded Developers Cautious on Multicore Auto Cooperation Improves Test Altera Launches DO-254 Partner Network Building an ‘Instant-Up’ Real-Time Operating Systems An Architecture for Reusable Embedded Systems Software Free up Bandwidth in PCI Express Evaluating Software in Medical Devices Circuit Sensitivity in Analog Circuits Choosing Flash Memory New Products Advertising Contacts

Embedded Systems Design Europe - May 2008

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