Embedded Systems Design Europe - May 2008 - (Page 24)

PCI Express transactions and are not the preferred means of high-bandwidth data delivery. While IO reads and IO writes are part of the standard, usage of these mechanisms is really the result of legacy endpoint devices. PCI Express encourages the use of a memory write over an IO write because it is twice as bandwidth-efﬁcient compared with the legacy approach. That said, PCI Express still maintains the ability to generate IO read and IO write cycles, and the compatibility to legacy PCI operation (through the use of a PCI Express-to PCI bridge). DUAL CAST Actions requiring both the initiator and the completer to return a response increase link trafﬁc. Dual casting takes advantage of the same memory write principles and features. Dual casting is the process of taking a single memory-write transaction targeted at two separate memory locations and performing the host operation in a single PCI Express transaction, rather than two. Because no return completion is necessary and link-to-link signal integrity is managed by the protocol itself, data delivery for memory write-intensive mirroring applications is effectively doubled. Performance is boosted both in increased available source port bandwidth and also reduced CPU utilization. As embedded-system designers 24 become aware of and use this feature, performance gains will be seen in graphics, storage, computing and imaging. Dual casting is ideally suited to enhance the performance of dualGPU systems. As Figure 1 shows, two GPUs are used to paint a single screen. Because graphics processing has a predeﬁned set of steps running in parallel and in processing order, the CPU can simultaneously cast drawing commands to both GPUs for processing. Each GPU then renders its speciﬁed portion of the screen. As shown in the ﬁgure, one per frame, GPU2 then transfers its image to GPU1 via the peer-to-peer PCI Express communication feature already built into the PCI Express switch. GPU1 updates the screen with both images, providing more realistic, high-bandwidth video. By using dual casting, CPU utilization is reduced, providing more cycles for general-purpose processing of other activities. STORAGE A complete industry has arisen out of the need to have and ensure accurate copies of data generated within a server system. Disk mirroring (RAID 1) can be made easier, faster with the introduction of dual casting operation. The availability of dual casting coupled with the native speed of PCI Express can be used to mirror data without compromising system performance. In standard mirror applications, the user can chose synchronous or asynchronous duplication. (Asynchronous means that no conﬁrmation is made of the copy set of data, so as to maximize system performance.) With dual casting implemented, there is no need for such a choice. There is no loss in data integrity nor any drop in performance as the mirror copy is created and veriﬁed the same as any other posted transaction. (Note however, a memory write is a standard PCI Express posted transaction and, as such, does not receive a completion TLP. The DLLP ACK/NACK protocol is still maintained to ensure packet integrity.) Figure 2 highlights a dual-cast storage application where data is mirrored (see blue arrows) on separate systems. Additionally, system read availability is enhanced as each CPU can independently access the mirrored information. Non-transparent (NT) bridging is used to connect two PCI Express root complexes together without one device overwriting the allocated register space of the other. The same data mirror, as shown in Figure 3, can also act as a redundant, dual-host communication system. A memory write from the Host 1 or endpoint can be mirrored in the redundant system. (Figure 3 shows a packet sent upstream to both hosts.) As the main processor or endpoint completes its activity, the memory write packet MAY 2008 | embedded systems design europe | www.embedded.com/europe http://www.embedded.com/europe

Table of Contents Feed for the Digital Edition of Embedded Systems Design Europe - May 2008

Embedded Systems Design Europe - May 2008 Contents Microsoft Provides Embedded Roadmap Enea Buys Developers Irish Start-Up Raises Funds for Telecom FPGAs Kontron Promotes COM Express Nano Mentor Nucleus Platform Provides UI for Atmel Small Form Factor Boards Head for the SUMIT Proffibus Advances IO-Link Integration Embedded Developers Cautious on Multicore Auto Cooperation Improves Test Altera Launches DO-254 Partner Network Building an ‘Instant-Up’ Real-Time Operating Systems An Architecture for Reusable Embedded Systems Software Free up Bandwidth in PCI Express Evaluating Software in Medical Devices Circuit Sensitivity in Analog Circuits Choosing Flash Memory New Products Advertising Contacts

Embedded Systems Design Europe - May 2008

For optimal viewing of this digital publication, please enable JavaScript and then refresh the page. If you would like to try to load the digital publication without using Flash Player detection, please click here.