Embedded Systems Design Europe - May 2008 - (Page 39)

memory ler with built-in boot NOR ﬂash, NAND ﬂash and RAM, all in one package. Using the RAM cache in front of the NAND ﬂash, the controller handles on-demand paging and other memory management functions. In addition, the RAM cache renders the memory subsystem addressable linearly, and as simple as an SRAM. The RAM block is divided into two host-accessible, user-conﬁgured partitions: a cache partition for Pseudo-NOR (PNOR) and a system RAM partition for the host. The NAND block is used as nonvolatile storage for the PNOR area and the memory-mapped ATA NAND disk area. The conﬁgurable PNOR block emulates the NOR function by using RAM cache and NAND ﬂash. Because NAND is used as the main nonvolatile storage media, this solution provides large XIP code storage that can effectively replace the traditional higher cost, high-density NOR ﬂash. By using the industry standard ATA data-storage protocol on the standard RAM (PSRAM or SDR/DDR SDRAM) bus, this solution provides large ATA-like data storage for the growing multimedia applications. In addition, the RAM cache in the PNOR block also helps to extend the endurance and reliability of the code and data storage area by minimizing direct read/write access to the NAND ﬂash. Because it’s offered in a small-footprint package, this managed memory subsystem may simplify the host interface, reduce system complexity, shorten design time, reduce overall system cost, and improve quality and reliability. Other beneﬁts include the user-conﬁgurable XIP PNOR area; robust hardware error detection and correction for MLC and SLC NAND; and scalability to higher densities. With no complicated software and hardware development required, this type of managed memory subsystem could be the Godot we’re all waiting for. Vijay Devadiga (vdevadiga@sst.com) is a senior staff product marketing engineer at Silicon Storage Technology Inc. in the NAND and Smartcard Module Business. In this role, he is responsible for product marketing of the company’s All-in-OneMemory product line. 39 host processor. Therefore, these hybrids are less than complete. Today’s systems need an easy-to-use, single-standard bus, completely managed memory subsystem for code and data storage and system RAM, all in one device. What system designers need is a complete memory subsystem that offers hundreds of megabytes of XIP code storage and also satisﬁes the growing datastorage needs of today’s multimedia applications. The solution should blend the key beneﬁts of NOR (fast read), NAND (lower cost and higher density), and RAM (simple bus operation). This solution also must be easy to use, easy to design in, and completely managed. Thus, it requires minimal or no additional hardware or software development, offers a standard interface for seamless integration with the host chip set/processor without any glue logic, and makes memory subsystem access as simple and easy as an SRAM. The built-in controller in this memory subsystem solution must implement ECC, bad block management, and wear-leveling to manage the defects in the built-in NAND ﬂash. The controller must also manage the complexity and deﬁciency of all the built-in memories (NOR, NAND, and RAM) to off-load the host system from handling these complicated management functions. Furthermore, this solution must address the total system cost by reducing the material, development, and manufacturing costs. In addition, it must address the time-to-market needs of system designers working on mobile and consumer electronic devices by offering a solution that’s easy to integrate and is scaleable for future products. NEXT GENERATION SUBSYSTEM Managed memory subsystem products are available today that offer all the features and beneﬁts mentioned. For example, one such conﬁguration shown in Figure 4 consists of a memory control- www.embedded.com/europe | embedded systems design europe | MAY 2008 http://www.embedded.com/europe

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Embedded Systems Design Europe - May 2008 Contents Microsoft Provides Embedded Roadmap Enea Buys Developers Irish Start-Up Raises Funds for Telecom FPGAs Kontron Promotes COM Express Nano Mentor Nucleus Platform Provides UI for Atmel Small Form Factor Boards Head for the SUMIT Proffibus Advances IO-Link Integration Embedded Developers Cautious on Multicore Auto Cooperation Improves Test Altera Launches DO-254 Partner Network Building an ‘Instant-Up’ Real-Time Operating Systems An Architecture for Reusable Embedded Systems Software Free up Bandwidth in PCI Express Evaluating Software in Medical Devices Circuit Sensitivity in Analog Circuits Choosing Flash Memory New Products Advertising Contacts

Embedded Systems Design Europe - May 2008

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