Embedded Systems Design Europe - June/July 2008 - (Page 17)

cover feature cisions and perform design tradeoffs. At this stage, the virtual prototype may use a cycle-accurate ISS for the processor and an automatically generated model of the memory controller in order to ensure that the latency and throughput requirements for memory accesses are being met. As the design ﬁrms and software engineers begin using the virtual prototype for software development, the cycle-accurate ISS and memory controller may be swapped out for less accurate but higher speed implementations. Other components in the system may be modeled at a high level of abstraction to deliver the fastest execution speeds or be represented using automatically generated models to deliver the greatest accuracy. INTERCHANGEABLE MODELS In many cases, abstract models and automatically generated models for the same component can be interchanged to enable a virtual prototype to represent speed or accuracy for each component depending upon the needs of the individual programmer. A driver developer may require a hardware-accurate model for certain components and only require abstract representations for the others. A virtual platform with both hardware-accurate and abstract models for various components allows for the straightforward tradeoff of speed versus accuracy as the software development needs evolve. The actual platform execution speed in this hybrid approach typically varies depending upon the accuracy of the overall platform but can reach well into the MIPS range. More important than the execution speed, however, is the debug throughput that can be achieved. The versatility, visibility, and wider deployability of a virtual prototype enable software bugs to be found and ﬁxed substantially faster than is possible with a physical prototype. The value of virtual prototypes is not conﬁned to early software development. There are multiple places prototypes are playing an important part here as well. Virtual models automatically generated from a hardware description can generate waveforms. These waveforms are then utilized by power estimation tools to accurately proﬁle the power consumption of system components while running software. This ﬂow is demonstrated in Figure 3. A virtual prototype is executing system software. As this software interacts with the compiled components in the system, they generate waveforms that represent the true hardware behavior of the system. These waveforms can then be passed into power-estimation tools to generate a power proﬁle of the system while executing software. Power estimates generated while running software are more accurate since the system resource usage matches what will occur in real silicon. This same technique can be used on chips that have already been manufactured to proﬁle power usage while running software. This enables software-driven power optimizations without the need to modify the hardware. MANY THINGS, MANY PEOPLE The ﬂexibility and adaptability of software-based virtual prototypes allow them to be many things to many people. The system architect can have a cycle-accurate platform to make early design decisions. The driver developer has a platform containing accuracy where it is needed for driver development but speed where it is needed for debugability. Finally, the high-level software engineer has a functional platform for developing and debugging application software. We’ve examined a number of different approaches to virtual prototyping in this article. A follow up article available on line at Embedded.com will present a real-world application of virtual-prototype creation and use for software development. Bill Neifert (bill@carbondesignsystems. com) is a cofounder of Carbon Design Systems. 17 where they can add value to the system design lifecycle. An accurate virtual platform running real system software is an invaluable tool for the system architects who were some of the methodology’s earliest adopters. The virtual environment enables architects to play out various scenarios and conﬁgurations to easily proﬁle execution and identify problem areas. Armed with this data, they can conﬁdently make important architectural tradeoffs in areas such as bus-widths, memory latency, arbitration schemes, and a host of other conﬁgurable areas. Power usage is increasingly in the forefront when design decisions are made in modern systems, and virtual www.embedded.com/europe | embedded systems design europe | JUNE – JULY 2008 http://Embedded.com http://www.embedded.com/europe

Table of Contents Feed for the Digital Edition of Embedded Systems Design Europe - June/July 2008

Embedded Systems Design Europe - June 2008 Contents Work in Progress to Define Compact PCI Plus Power.org Demonstrates New Tools Project Supports Multi-core System Programming Altium Links Electronic to Mechanical Design PLDs Look to Cut Power Budget and Costs Project to Provide Coverage Analysis Tool Microsoft Details Windows Embedded Update Cover Feature: Leveraging Virtual Hardware Platforms for Software Allocating Memory in MATLAB-to-C Code MDD & IDEs: Making the Twain Meet in Embedded System Designs Debugging Mixed Signal Designs for Infrequent & Random Events Why Open Source is the Natural Choice for High-security Systems Bringing the Benefits of Low Power CPUs to Modular Design New Products Advertising Contacts

Embedded Systems Design Europe - June/July 2008

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