Embedded Systems Design Europe - November 2007 - (Page 32) multiprocessing scheduling and via parallel ALUs Where FPGAs offer a significant advantage is in the latter two types of parallelism. Parallelism is inherent in an FPGA’s architecture and can be leveraged by hardware designers or by software-to-hardware compilers for algorithm acceleration. For this purpose, FPGAs are now being deployed alongside traditional processors in high-end computing systems, creating what might be called a hybrid multiprocessing approach to computing. Examples of off-the-shelf FPGA technologies with soft- and hard-logic embedded processors extendable using coprocessing engines include: models for parallel computation. Three primary programming models are highly dependent on the processor selected and the types of interfaces that are used within the system architecture. Coprocessing models are generated using C-based language extensions and related constructs. When considering a multiprocessing strategy for any application, it’s important to consider appropriate methods of process-to-process communication. In fact, for practical applications, the quality of application partitioning and the throughput of data from one processor to another may require more development time than any other single area. Choosing an appropriate programming model for a specific application and target platform is a critical step in achieving performance goals. In this context, the programming model is a method of abstracting the architecture of a target platform in such a way that applications can be more easily and efficiently designed for that platform. An effective programming model is one that can properly express the application while enabling developers to exploit the advantages of the platform. C PROGRAMMING FOR FPGAS Programming software algorithms into FPGA hardware has traditionally required specific knowledge of hardware design methods, including the use of hardware description languages (HDLs) such as VHDL or Verilog. Although these methods may be productive for hardware designers, they typically aren’t suitable for embedded systems programmers or higher-level software programmers. Fortunately, software-to-hardware tools now exist that enable software programmers to describe their algorithms using more familiar methods and standard programming languages. For example, using a C-to-FPGA compiler tool such as Impulse C from Impulse Accelerated Technologies, a software programmer can describe an application and its key algorithms in C with the addition of relatively simple library functions to specify interprocess communications. The algorithms can then be compiled automatically into HDL representations, which are subsequently synthesized into lower-level hardware targeting one or more FPGAs. While a certain level of FPGA knowledge and indepth hardware understanding may still be needed to optimize the application’s performance, the formulation of the algorithm, the initial testing, and the prototype hardware generation can now be left to the software programmer. For system- or application-level parallelism, standard C can be extended in support of various parallel programming models. The standard ANSI C language doesn’t include support for parallel programming, but there are many thousands of software programmers today using C-language thread libraries to manage parallel control flows in an application. Threading can be an effective strategy within a single processor, if threading capabilities have been provided in the form of run-time libraries or an operating system. Streaming is another programming model that supports parallel applications. Streaming is an ideal programming model for many applications in the domain of high-performance embedded computing, in which low-latency yet complex computation of data is required. The streaming programming model is also well suited to mixed-processor/ FPGA platforms. With a streaming approach, software running on an embedded processor can be easily interfaced to one or more hardware accelerators running in the FPGA. Shared memory is a programming model that emphasizes the use of internal or external memory resources as a communication mechanism between connected processes. Shared memory can be quite effective for platforms that don’t have high-performance streaming interfaces or in which larger amounts of data must be quickly moved from one processing element to another. While not a distinct program- • • • • • • Actel Cortex M1 32-bit soft core Actel CoreMP7 32-bit soft core Altera NIOS II 32-bit soft core Lattice Freedom core 32-bit soft core Xilinx MicroBlaze 32-bit soft core Xilinx PowerPC 32-bit hard core FPGA PROGRAMMING MODELS FPGAs represent a new class of parallel processing devices that are quite unlike traditional processors. For software developers, the added tasks associated with programming FPGAs may outweigh their potential benefits for performance and power. Fortunately, FPGA programming tools are making rapid advances. With tools available today, it’s possible to program FPGAs using familiar software programming languages and multiple parallel programming models. For C programmers, multiple tools are now available that combine C-compatible parallel programming methods with automated compiler and optimizer technologies. These tools can automatically detect and exploit parallelism at a lower level, for example at the level of individual subroutines and inner code loops. At the same time, they enable programmers to describe and verify parallel behaviors at the system level, using familiar C-language compilers and debuggers combined with well-defined 32 NOVEMBER – DECEMBER 2007 | embedded systems design europe | www.embedded.com/europe 030-031-032-033-034-035_ESDE.ind32 32 9/11/07 11:27:16 http://www.embedded.com/europe
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