Embedded Systems Design Europe - November 2007 - (Page 35) multiprocessing a processor-only equivalent algorithm. The ability to add coprocessing engines is limited only by the device’s size. This scalability can also be applied to hard embedded processors in FPGAs; coprocessing acceleration engines implemented as hardware peripherals in the FPGA allow direct access to the processor’s pipeline. Like the accelerated FIR filter implementation just described, similar levels of scalability can be accomplished using multiple coprocessing engines attached to the dedicated APU interface. Using these hardware acceleration engines and the APU quad-word instructions (enabling the transfer of 128 bits from cache or external memory directly to/from the fabric) achieves even greater acceleration when compared with single-word accesses. An accelerated streaming video example demonstrates the concept of a single-chip, multiprocessor accelerated embedded systems. In this video streaming application, one PowerPC Impulse C tools used to accelerate and generate the soft coprocessing acceleration core to increase the frequency of the FIR filter (by a factor of 400X). MicroBlaze Core with MicroBlaze Core (v5.00) hardware coprocessing Slices FFs LUTs Cycles/time Table 1 3,275 2,976 4,300 111M/2.2 sec 4,175 3,644 5,613 320k/6.4 ms processor runs an operating system, acts as Web server, and provides some of the computation processing. The second processor is dedicated to performancecritical processing including IDCT and color conversion. Quad-word transfers are used as part of the IDCT, color conversion, and for transferring video images from one processor to the other and into the TFT memory for display. Using the PowerPC accelerated system, the performance of the color conversion algorithms was increased by a factor of 10 compared with running the algorithm only in software. Accelerating the IDCT algorithm using the APU achieved 3X increase in performance. Note that this architecture is highly flexible and can accommodate additional processors to increase computational capability. Dan Isaacs (dan.isaacs@xilinx.com) is the director of embedded processor marketing in Xilinx’s Advanced Products Division. Ed Trexel (edward.trexel@impulsec.com) is a senior applications engineer at Impulse Accelerated Technologies. Bruce Karsten (bruce.karsten@xilinx.com) is a senior processor specialist in Xilinx’s platform sales group. From concept to completion, We can nd a solution! We optimize your heatsink designs. Complimentary designs, from CFD simulations to nal product! radian ISO 9001:2000 Certified Custom and standard solutions to solve your thermal needs. web: www.radianheatsinks.com · tel: 001-408-988-6200 · fax: 001-408-988-0683 Radian Heatsinks is a division of Intricast Company Inc. Thermal-overlay-ese.indd 1 10/3/2007 | embedded systems design europe | NOVEMBER – DECEMBER 2007 www.embedded.com/europe11:55:32 AM 35 030-031-032-033-034-035_ESDE.ind35 35 9/11/07 11:28:10 http://www.radianheatsinks.com http://www.mpl.ch http://www.mpl.ch http://www.radianheatsinks.com http://www.embedded.com/europe
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