Embedded Systems Design - March 2008 - (Page 37)

0308esd.p33to37 2/14/08 12:16 PM Page 37 +++ N O R O Y A LT I E S +++ Listing 1 Example program showing use of BXOR and BXORSHIFT instructions. // _CRC_BXOR - calculate the CRC of a message polynomial // for a given generator polynomial. #deﬁne MSG_LEN 32 // bits #deﬁne CRC_LEN 16 // bits _CRC_BXOR: a1 = a0 = 0; r1 = 0x8408 (z); a1.w = r1; r2.h = 0xd065; r2.l = 0x86c9; // // // // initialize LFSR state LFSR polynomial, reversed: x^16 + x^12 + x^5 + 1 initialize LFSR mask embeddedsoftware solutions embOS ® Ev a av l ver ail si ab on le s (RTOS) +++ 8/16/32 bits +++ // r2 = message Preemptive multitasking Zero interrupt latency Easy to use start project included Profiling support included Object/source code available p1 = MSG_LEN (z); loop _MSG_loop lc0 = p1; loop_begin _MSG_loop; r2 = rot r2 by 1; a0 = bxorshift(a0, a1, cc); loop_end _MSG_loop; r0 = 0; // CRC r2.l = cc = bxor(a0, r1); r0 = rot r0 by 1; p1 = CRC_LEN-1 (z); loop _CRC_loop lc0 = p1; loop_begin _CRC_loop; r2.l = cc = bxorshift(a0, r1); r0 = rot r0 by 1; loop_end _CRC_loop; // r0 now contains the CRC _CRC_BXOR.end: emWin ® (GUI) +++ 8/16/32 bits +++ ANSI "C" source code, no C++ required Supports b/w, grayscale and color 2D graphic library included Variety of fonts included PC simulation included Window Manager/Widgets (opt) tion code. Here, the LFSR state (A0) and the mask (A1), which contains the coefﬁcients of the generator polynomial, are initialized (Make sure to initialize the high byte of A1 as well). According to the deﬁnitions of an External LFSR as in Figure 2, A1’s lsb is populated with the generator polynomial’s high order coefﬁcient. In the above example program, the 32-bit message ﬁts into one register and is fed into the LFSR starting with the msb. The second part of the program is a loop of k iterations. In each iteration, one bit from the message is extracted and put in CC. Then, it is fed in and the LFSR state is updated according to the BXORSHIFT functional description (see the Blackﬁn instruction set documentation). That is, A0 is masked by A1, then the result is XOR-reduced and added to the input bit CC. The resulting bit is pushed into the lsb of A0 while the whole register is shifted to the left. In case the message is longer than 32-bits, a loop wrapping this part may be required, where a new data word is read into R2 from the message memory buffer. In the third part of the program, we use the second variant of BXORSHIFT, this time without feedback. However, because in this variant the shift operation takes place prior to the XOR-reduction, we start by calculating the ﬁrst output bit with a BXOR instruction operating on the last state. Then we continue with loop of n-1 iterations. In each iteration, A0 is updated and a new output is put in CC. Then, the CRC register (R0) is shifted left with the CC bit put into its lsb. At the end of this part, R0 contains the n bits of the CRC string. ■ Yaniv Sapir is a project leader at the Digital Media Technology Center in Analog Devices, developing embedded media algorithms and software for ADI’s Blackﬁn processor. Yaniv holds a B.Sc. in aerospace engineering from the Technion, Israel Institute of Technology. He may be reached at yaniv.sapir@analog.com Yosef Stein serves as DSP principal system architect/advanced technologies manager in the Digital Media Technology Center working on the development of broadband communication and image compression enhanced instructions for Analog Devices’ ﬁxed point DSPs. Yosef holds a BSc in electrical engineering, Technion. He may be reached at yosi.stein@analog.com emFile (File system) +++ 8/16/32 bits +++ ANSI "C" source code MS-DOS/MS-Windows compatible FAT12, FAT16 and FAT32 support Multiple media support Non FAT file system available For ARM Chips: JTAG debug solution with flash programming phone: 978-874-0299 www.segger.com 37 www.embedded.com | embedded systems design | MARCH 2008 http://www.segger.com http://www.embedded.com

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Embedded Systems Design - March 2008 Contents #Include Programming Pointers Designing DSP-based Motor Control Using Fuzzy Logic Hardware/Software Verification Enters the Atomic Age Efficient CRC Calculation with Minimal Memory Footprint Programming Your Own Microcontroller Advertising Index Break Points Marketplace

Embedded Systems Design - March 2008

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