Embedded Systems Design - August 2008 - (Page 29)

0808esd.p27to29 7/17/08 11:52 AM Page 29 tems in different ways and ensure that the assessment is reasonable across a wide range of applications, from the basic task running without the hypervisor to several virtual machines running. These results are then combined to provide the overall score. Scenario #1 runs each of the workloads sequentially, to be measured N times without the hypervisor and stores total execution time as RESULT#1 and the power consumption as ENERGY#1. In scenario #2, each of the workloads runs sequentially N times in one virtual machine with the hypervisor, giving a total execution time as RESULT#2 and power consumption as ENERGY#2. Scenario #3 sees three separate virtual machines each running the workloads N times with all other parameters for the workloads the same as in scenarios #1 and #2, providing RESULT#3 and ENERGY#3. The benchmark is calculated from the difference in execution time between Scenario 1 and 2 as the percent overhead for a single virtual machine, and the difference in execution time between Scenario 1 and 3 as the percent overhead for multiple virtual machines. RESULTS It’s vital to stress that the EEMBC hypervisor benchmark scores can only be compared for hypervisors running on identical systems, from exactly the same CPU and board with the same clock frequencies, cache/memory configuration and speeds, to the same compilers, linkers and libraries, and, of course, the identical versions of the software. These scores can also only be compared with the same number of iterations, types, and order of workloads, as initial testing has shown that variations can make significant differences. SURPRISING FINDINGS Some of the early evaluations have revealed surprising results. The implementation of the hypervisor makes a significant difference to the workload’s operation and the system’s efficiency. With some hypervisors, the number of workloads that a hypervisor can support can plateau quite rapidly, indicating that adding more processes is not cost or power effective. MOVING FORWARD Several key issues exist for hypervisors running on multicore devices, including load balancing (or rather dynamic resource allocation, shifting the resources between cores while in operation), debugging the operation across multiple cores with synchronized break points, and the way the cores themselves and the processes communicate. This set of EEMBC’s benchmarks does not specifically address these issues, and the operation of multiple work loads across multiple cores doesn’t allow for dynamic changes in resources or look at the communications, nor does it show how easy these systems are to work with. Eventually benchmarking will cover the interactions between multiple cores on a single chip and document how easy a hypervisor is to implement and use; the need for this data is inspiring systems developers to push for standards at the software level that allow the same hypervisor implementation to be used across different processor architectures. Once achieved, this flexibility will further drive the reuse of applications across new devices and provide higher performance and lower power consumption for the next generations of embedded systems. ■ Markus Levy is founder and president of EEMBC. He is also president of The Multicore Association and chairman of Multicore Expo. He was previously a senior analyst at In-Stat/MDR and an editor at EDN magazine but began his career in the semiconductor industry at Intel Corporation, where he served as both a senior applications engineer and customer training specialist for Intel’s microprocessor and ﬂash memory products. He is the co-author of Designing with Flash Memory. You may reach him through www.eembc.org. www.embedded.com | embedded systems design | AUGUST 2008 29 http://www.segger.com http://www.segger.com http://www.eembc.org http://www.embedded.com

Table of Contents Feed for the Digital Edition of Embedded Systems Design - August 2008

Embedded Systems Design - August 2008 Contents Number Include Parity Bit Programmer's Toolbox Cover Feature: Virtualization for Embedded X86 Multiprocessor Applications Wanted: Industry Standards for Benchmarking Embedded VMM Hypervisors Achieving Cache Coherence in a MIPS32 Multicore Design Memory Allocation in C Advertising Index Break Points Marketplace

Embedded Systems Design - August 2008

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