Microwave Engineering Europe - March 2008 - (Page 24)

24 EDA — CIRCUIT EXTRACTION ACE Automated Circuit Extraction returns to real design by exploring design alternatives and changes in seconds By Dr. Michael Heimlich, Director, Microwave and SI Segment, AWR Europe, mike@awrcorp.com and Andy Wallace, European Applications Consultant, AWR Europe, awallace@awrcorp.com T he traditional approach to microwave and RF circuit design — the present day foundation for high-frequency wireless designs — is being pressured simultaneously by an increase in operating frequencies/bandwidth and a decrease in overall circuit size/dimensions. The result is that the electrical and physical design challenges faced by circuit designers are rapidly increasing, while choices for how these challenges should best be addressed are not. Communications designers developing products with GHz frequencies and Gbps edge rates who are using traditional printed circuit board (PCB) signal integrity (SI) solutions are ﬁnding that while their designs behave well under virtual prototype or simulation scenarios, they are failing when migrated to build and test. Why? Because the design of the interconnects above 1 GHz is an increasingly important issue — no longer a second- or third-order effect that can be largely ignored. Due to both large-scale integration and higher operating frequencies, interconnects no longer operate as simple lumped RLC circuits and so the modeling and simulation of these high-performance and complex design interconnections must be taken into account right from the beginning. Designers who do not do this are ﬁnding themselves spending excessive time and money on redesigns and re-spins, and experimenting on the test bench, which adds cost to the ﬁnal product not only in additional “ﬁx-it” components, but ultimately in lost market window opportunities. ACE™, an innovative circuit extraction technology now available in the Microwave Ofﬁce® 2007 design suite from AWR®, was developed speciﬁcally to deliver productivity beneﬁts to the designers of today’s complex, next-generation communications products. This novel circuit extraction design approach Figure 1: RLCK models for a dispersive microwave transmission line used by digital and AMS extractors. dramatically reduces from hours to seconds the time required to perform the initial extraction and modeling of complex interconnects. In addition, it enables the designer to integrate interconnect modeling at the earliest stages of the design ﬂow, where problems can be identiﬁed and corrected before costly and time-consuming redesigns are required. These beneﬁts deliver a higher degree of conﬁdence in less design cycle time, ensuring that products will be volume manufacturable, costeffective, and timely. The AWR circuit extraction technology enables Microwave Ofﬁce users to leverage layout-based models for circuit extraction as opposed to traditional schematic-based designs/ﬂows. It provides a dramatic and revolutionary methodology shift to layoutdriven simulation through a sophisticated mechanism for automating the bookkeeping and partitioning of structures into preexisting models. The introduction of this technology is ground-breaking in that productivity is enhanced further through the use of AWR’s Intelligent Net™ (iNet) schematic-layout interconnect automation technology. This capability is ideal for RF/microwave designs where the modeling of interconnects is not well-suited to traditional circuit-based approaches, or where the interconnects are parasitic and dense, yet critical to overall product performance. The ACE technology, which is similar to parasitic extraction techniques for digital and analog designs, is orders of magnitude faster than the traditional EM methods normally used for RF/microwave interconnect extraction because it groups interconnects together and effectively creates a schematic model using distributed and coupled-line circuit elements. Similarly, rather than using generalized ﬁnite element method (FEM) or method-of-moments (MOM) solvers designed for arbitrary arrangements of geometries, many of these circuit elements leverage highly optimized EM solvers, providing a tremendous speed advantage. Consequently, the engineer’s response has been to forego detailed schematic Microwave Engineering Europe ● March 2008 ● www.mwee.com 024_025-026-028-029_030_MWEE.ind24 24 21/02/08 11:08:05 http://www.mwee.com

Table of Contents Feed for the Digital Edition of Microwave Engineering Europe - March 2008

Microwave Engineering Europe - March 2008 News Contents Comment Wireless Infrastructure: A Direct Conversion I/Q Demodulatordrives Favorable Basestation Cost-performance Metrics Wireless Infrastructure: Mobile World Set to Reshape the Internet RF Amplifiers: Latest Advances in RF Amplifiers Include a CMOS PA Operating at 77 GHz and Significant Advances in PAs for WiMAX and Broadband Applications Many Applications Still Require Unique Performance Benefits of BeO ACE Automated Circuit Extraction Returns to Real Design by Exploring Design Alternatives and Changes in Seconds Exceeding the Standard for Wireless Sensor Networks Products Calendar

Microwave Engineering Europe - March 2008

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