Microwave Engineering Europe - March 2008 - (Page 25)

EDA — CIRCUIT EXTRACTION 25 Figure 2: ACE extracted netlist from a multi layer board design. level design and go straight to post-layout analysis and veriﬁcation as a weak, but faster, alternative to either capturing the interconnects as schematic microstrips and striplines or doing some early, preliminary EM analysis. While this method saves engineering time by avoiding the manual insertion of various RF and microwave line models, the trade-off is that the overall engineering time grows as the analysis and veriﬁcation burden for using EM as a design tool has mushroomed. The reality has unfortunately become inﬁnite “layout & EM analysis” cycles as lines are moved and vias replaced. This is all being done without any design engineering methodology, ﬁrst principles insight, or a parametric handle into or behind the reasons for doing so. This situation is all the more critical when considering that by the time a layout is complete enough to do this sort of “layout & EM analysis” cycle, the design is much closer to the end of its cycle than the beginning. Study after study on the engineering of complex systems, from spacecraft to software to electronics, shows that it is much more cost-effective to identify and ﬁx design deﬁciencies as early as possible in the design cycle. However, doesn’t this mean that the improper use of EM as a design tool makes this a costly and risky proposition to many RF and Microwave design ﬂows? EDA developers are working to “catch-up” with the multitude of design challenges created by the exploding wireless communications market. This paper describes the new ACE technology and discusses real-world design examples where this new software approach provides an accurate, efﬁcient, modern methodology as an alternative to traditional RF and Microwave design approaches that no longer meet the challenges of nextgeneration communications product design. What is ACE? ACE automated circuit extraction technology is an innovative response to the overuse of EM as a design tool. ACE software reclaims parametric design for the user by creating netlist-based representations of complex interconnects using the very same networks of parametric models designers themselves would use if they had the time and patience to do so, in a fraction of the time that it would take EM tools to create equivalent S-parameters. The speed, accuracy, and parametric nature of ACE software enable engineers to return to real design by exploring design alternatives and changes in seconds. Obviously, EM veriﬁcation is still a necessary part of the ﬂow, but the ACE tool enables engineers to design once again rather than analyze, even on many of the most challenging RF and microwave designs. ACE software is based on the proven digital and analog-mixed signal (AMS) technique of circuit extraction from physical layout, but uses microwave models and principles. The tool puts the engineer back into the driver’s seat of design by creating circuit models from layout geometries. The ACE tool, like all circuit extractors, creates a model for interconnects by geometrically analyzing a layout through breaking it down into pieces that the extractor understands, mapping each piece of the reduced geometry to a model, and then combining the models intelligently to create a simulatable representation. Digital and AMS extractors typically use the RLCK models shown in Figure 1 to model interconnect-reduced geometries, but these require very dense networks at microwave frequencies to capture dispersion and skin-effect and they tend to be bandwidthlimited. ACE software, on the other hand, views the layout in terms of distributed line, coupled-line, and discontinuity models that microwave engineers have been using for years, such as MLIN/SLIN, MTEE/STEE, and M2CLIN/S2CLIN, and so dispersion, skin-effect, and bandwidth are non-issues. Moreover, vias can be modeled with S-parameter ﬁles from pre-deﬁned via libraries, a ﬁxed resistance or an AWR VIA mode. The ACE tool generates in seconds a detailed, extensive netlist (Figure 2) for complex arrangements of interconnects that engineers would prefer to make, but either don’t have the hours or days in which to do it or ﬁnd it too error-prone. EM analysis would take days or even weeks for a single design iteration, provided the computer hardware didn’t crash. ACE software goes even a few steps further than this. As part of the way in which it views the schematics, the same ground planes that are assumed for substrate deﬁnitions are found and simpliﬁed so that lines separated by a ground plane are not grouped together in a coupled line structure. Even with low temperature co-ﬁred ceramic (LTCC) materials, where dielectric constant and thickness may vary, ACE software deﬁnes on-the-ﬂy substrate deﬁnitions for the distributed models it extracts. Also, for lines that crossover on different layers not separated by a ground plane, a coupling capacitor is calculated based on geometry. To obtain the highest degree of accuracy, the ACE tool can even be directed to extract geometries to models, which themselves have highly optimized, built-in EM solvers. In many cases, the software can provide accuracy that is similar to EM analysis, but is hundreds, if not thousands, of times faster for design tasks early and throughout the design ﬂow. The ACE technology uses all of the schematic-level models designers would use to model complex interconnects if they had the time and the patience. For fast, efﬁcient, and accurate answers it uses closed form models such as MLIN and SLIN for lines, MTEE for t-junctions, and M2CLIN for coupled lines. Without sacriﬁcing speed, AWR’s best-in-class X-models (EM table-based models with Microwave Engineering ● March 2008 ● www.mwee.com 024_025-026-028-029_030_MWEE.ind25 25 21/02/08 11:08:20 http://www.mwee.com

Table of Contents Feed for the Digital Edition of Microwave Engineering Europe - March 2008

Microwave Engineering Europe - March 2008 News Contents Comment Wireless Infrastructure: A Direct Conversion I/Q Demodulatordrives Favorable Basestation Cost-performance Metrics Wireless Infrastructure: Mobile World Set to Reshape the Internet RF Amplifiers: Latest Advances in RF Amplifiers Include a CMOS PA Operating at 77 GHz and Significant Advances in PAs for WiMAX and Broadband Applications Many Applications Still Require Unique Performance Benefits of BeO ACE Automated Circuit Extraction Returns to Real Design by Exploring Design Alternatives and Changes in Seconds Exceeding the Standard for Wireless Sensor Networks Products Calendar

Microwave Engineering Europe - March 2008

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