Microwave Engineering Europe - November 2008 - (Page 30) 30 RF SWITCHES Linearity When 3G wireless added WCDMA to the handset, it complicated the switching requirements. In order to ensure network robustness, the third-order intercept (IP3) requirement was boosted to +68 dBm for the front-end switch. This meant that the switch could not generate a distortion signal greater than three trillionths of the WCDMA transmit signal. Fortunately, UltraCMOS can meet this difficult linearity requirement by leveraging its low-loss, low-capacitance sapphire substrate and the exceptional linearity of an intrinsic MOS device. Table 1 summarizes the SP9T performance of UltraCMOS and GaAs. Note that while insertion loss performance is approximately equal, linearity performance of UltraCMOS far exceeds that of GaAs. Voltage range UltraCMOS transistors are dielectrically isolated from one another, so they can be placed in series (or stacked) to tolerate the very high voltages levels that can be present in an antenna switch. Table 1 shows the wide VDD range of UltraCMOS, which matches well with handset supply voltage requirements. Although CMOS is low-voltage technology, peak-to-peak voltage handling of 50 V is readily tolerated. Additionally, on-chip bias generation provides for optimized performance and eliminates the need for external DC blocking capacitors. In terms of roadmaps, UltraCMOS bias generators are in development for direct operation from battery voltage or 1.8 V supplies. Footprint In a side-by-size comparison of SP9T solutions, the UltraCMOS die measures 1.43 mm2 while the GaAs SP9T die measures 2.85 mm2 (Figure 2). One way that UltraCMOS achieves this dramatically smaller die size is due to the fine design rules of aluminum metallization and the flexibility to place FETs in any orientation. (In an UltraCMOS chip, the complementary devices, analog control capability, and MOS capacitors allow for control of both series and shunt RF FETs with a simple four-wire interface and low current drain.) The figure also compares the size areas for a 4:16 decoder in the two designs. Front end size While dies size is important, the overall front end system size is even more so. Using flip-chip chip scale packaging technology for switches can significantly reduce the overall footprint of handset front-end modules (FEMs). FEMs are often manufactured using costly low temperature cofired ceramic (LTCC), so any reduction in module area can have significant Table 1: Performance comparison between UltraCMOS and GaAs SP9Ts. Figure 2: UltraCMOS SP9T switches feature approximately half the die size of a GaAs SP9T. Figure 3: Using flip-chip packaging can reduce the FEM footprint by 43 percent, even while adding more functionality to the switch (SP7T versus SP9T). Microwave Engineering Europe ● November 2008 ● www.mwee.com http://www.mwee.com
For optimal viewing of this digital publication, please enable JavaScript and then refresh the page. If you would like to try to load the digital publication without using Flash Player detection, please click here.