Microwave Engineering Europe - December 2008 - (Page 22) 22 WIRELESS ACCESS POINTS Advanced processor allows system designers to overcome challenges in next-generation enterprise-class wireless access points Meeting the price, performance, power and security challenges of 802.11n using 32-bit RISC communication processors By Dan Bouvier, Chief Technology Officer, AMC T he higher data rates and advanced services expected of next-generation 802.11n (Wi-Fi) and WiMAX-based wireless enterprise access points (APs) will require engineers to carefully balance the need for higher performance with cost and power consumption. This presents a difficult challenge for the approach they take in system design. In access points designed to utilize the emerging generation of 802.11n radios, which are currently able to achieve up to 300 Mbps, and will soon reach up to 600 Mbps, a separate host microprocessors is essential in order handle the much higher packet rates and wide range of new protocol requirements that have emerged. AP designs that in the past relied on just the embedded processor within the wireless chipset to handle this workload would quickly become overwhelmed. To meet the complex challenges presented by 802.11n technology, designers need an innovative microprocessor that can deliver great performance and integrated features like PCI Express, Gigabit Ethernet, USB2.0 and an advanced security engine. In addition to great performance and features, it’s essential for the processor to consume the least amount of power possible and deliver all of these capabilities at an affordable price. By anticipating the requirements for next-generation wireless access points and predicting system-level design needs, embedded designers will be better prepared to find an embedded processor ideally-suited to take on these challenging requirements. The IEEE 802.11 Working Group is closing in on a final specification for the new 802.11n Wireless LAN standard, with ratification expected by the first half of 2009. This revolutionary new WLAN standard will increase maximum Wi-Fi data rates by up to 10 times, taking them from a maximum of 54 Mbps for 802.11g and 802.11a to 600 Mbps with 802.11n. In addition to faster data rates, next generation access points will be expected to support several new protocols for quality of service (QoS), Voice over Internet Protocol (VoIP), and advanced security for VPN and IPSec. The 802.11n standard is a critical enabling technology for a wide range of enhanced WLAN applications, including high-definition (HD) video streaming, multi-channel high fidelity audio streaming, comprehensive network security, and multiple, simultaneous VoIP channels. An HD video stream will typically require 20 Mbps of dedicated bandwidth on a network. In first generation 802.11n radios, it is common to see up to 200 Mbps of available bandwidth, which is more than ample for two or even three 20 Mbps HD video streams. Compare this to 802.11g, which delivers a theoretical maximum data rate of 54 Mbps. But when you account for network overhead required to manage wireless links, the available bandwidth drops to less than half that rate under typical operating conditions, making it impractical for even a single compressed HD video channel. For this reason, video streaming over 802.11g networks has never achieved commercial success. With 802.11n’s support for high-performance radios, there is more than sufficient bandwidth available to simultaneously carry multiple HD video and VoIP channels across distances of up to 40 meters. In order to support these higher data rates and new services, next-generation wireless access point designs require a new breed of microprocessor. The ideal processor for stateof-the-art wireless access equipment requires high levels of integration to reduce system complexity, lowering the external component count and overall system cost. A cost effective microprocessor ideally-suited for 802.11n AP designs must be optimized for the demanding enterprise-class workloads and well-suited for both general networking and general purpose processing applications allowing economies of scale to keep it’s price low. To offer major enhancements in performance, bandwidth, security, and multi-platform support for next-generation access points (APs) based on the new 802.11n and WiMAX standards, designers should consider microprocessors that have the following attributes: • Processing performance up to 600 MHz, yielding 900 DMIPS; • Dual single-lane PCI Express ports, each with integrated SERDES to support connectivity to 802.11n/Wi-Fi, WiMAX, or other PCI Express-based chipsets; • Very low power dissipation, to ensure compatibility with 802.3af (PoE); • Integrated hardware-accelerated Turbo Security Engine for handling IPSec and VPN services, featuring single-pass operation and full header/trailer protocol processing independent of the CPU; • USB 2.0 On-the-Go with support for either host or device modes; • DDR1/2 memory support. But designers of these systems have to meet strict cost constraints. With that in mind, a microprocessor offering all the attributes listed above should be available for an average selling prices of under $20 to achieve design momentum. Scalable performance Today’s consumer grade 802.11a/g APs typically don’t have separate application processors; often there’s enough processing capacity available in the embedded processor core within the wireless chipset to handle AP tasks and a minimal number of higher-level protocols. The shift to 802.11n radios in access points, however, will require the addition of a Microwave Engineering Europe ● December 2008 ● www.mwee.com http://www.mwee.com
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