Microwave Engineering Europe - December 2008 - (Page 24) 24 WIRELESS ACCESS POINTS host processor to accommodate the increased data rates. In addition, new enterprise and residential network services require increased security, support for multimedia streaming and real-time VoIP, as well as support for the advanced protocols and standards behind these services such as H.232, IPSec, and AES. To meet these needs of all the services listed above, host processors used in next generation AP platforms should deliver up to 900 DMIPS of processing capacity. In order for developers to design AP systems that deliver full 802.11n data rates and advanced services, they must consider the system level throughput requirements, which should include PCI Express, since the majority of new 802.11n radio cards are shifting to this interface, 32-bit DDR2 memory for high performance, and Gigabit Ethernet to accommodate 802.11n data rates that are well above 100 Mbps. An example of an optimized processor architecture for 802.11n Access Points is shown below. (See Figure 1). Wireless AP designers will want the option of cost-reducing designs by optimizing frequency to their application or by enhancing AP capabilities over time. A versatile processor is ideally-suited to meet designer needs when it offers the scalability of 400, 533 and 600 MHz of CPU performance, or the option of single Gigabit Ethernet and PCI Express ports, or dual Gigabit Ethernet and PCI Express ports. For example, manufacturers can focus on time-to-market by completing their 802.11n AP platform without security or video streaming support. However, by designing in additional processing capacity, APs can be enhanced over time through software upgrades to introduce these features even after they have been deployed, without the need to replace hardware. Such scalability will encourage initial product sales – and early capture of critical 802.11n market share – since manufacturers will be able to guarantee early adopters that they will not be left behind as new capabilities are introduced. Overcoming bandwidth limitations through PCI Express PCI Express is the clear successor to PCI in wireless LAN applications. By providing a higher bandwidth interface while consuming less power, a single-lane PCI Express interface is able to ensure full bandwidth availability and utilization to radio modules or chipsets without compromise. PCI Express not only has the capacity to support 802.11n’s fastest data rates but also to evolve with the needs of next-generation APs as well. Developers need the flexibility in an embedded processor architecture to offer either a single, integrated PCI Express port or a dual PCI Express port with each capable of delivering 2.0 Gbps of bandwidth. Dual PCI Express support is essential for Enterprise APs which need to differentiate between high data rate and low data rate devices. While maintaining backward compatibility to 802.11a, 802.11b, and 802.11g devices, next-generation 802.11n devices have to deal with problems that arise when slower devices operate over the same frequency of highspeed devices. Performance of the high-speed devices will suffer unless dual PCI Express support is integrated in to the design to enable operation of two radios - one operating at 5 GHz for high-speed devices only and one at 2.4 GHz for slower devices. This will guarantee the performance of high-speed devices in AP designs (See Figure 2). Figure 1: A block diagram of the AMCC PowerPC 405EX shows an on-chip 128-bit processor local bus (PLB) operating at up to 200 MHz as an internal 2-way cross bar interconnect to guarantee full 802.11n data rates with minimal latency for wireless access point system designs. Unparalleled power performance In enterprise applications, the majority of APs are powered through 802.3af, commonly referred to as Power over Ethernet (PoE), in order to avoid the additional installation and maintenance costs of running power lines as well as CAT5 lines. The 802.3af PoE standard, however, typically delivers just under 13 W for attached equipment. Most enterprise-class APs using either 802.11g or 802.11a radios are able to operate within this power budget. However, next-generation 802.11n APs will require designers to direct more effort to minimizing power consumption since 802.11n radios will consume much more power than either 802.11g or 802.11a radios. Additionally, new enterprise APs will include dual radios, further increasing power consumption. Even in SOHO and residential networking applications, power consumption is becoming • Dual band b/g Tcvr & BB/MAC IC • 11b/g MAC processor cores typically ARM or MIPs 150MHz • 802.11i software w/HW AES • Tcvr typically 3x2 config, BB / MAC IC • Tcvr, BB, MAC, Memory and Host CPU all impacted • PCI Express • 10/100/1000 Enet • DDR1/2 memory • Crypto Engine, In-Line or Look Aside 3xTcvr/PA BB/MAC CPU/Mem Tcvr/PA BB/MAC CPU/Mem 11n Tcvr 11n Tcvr PA BB/MAC Embedded CPU 405EX GE Phy GE Phy PA 11b/g Tcvr BB/MAC Host CPU FE Phy 11n Tcvr FE Phy Security PA 11n Tcvr 11b/g Tcvr BB/MAC Memory 11n Tcvr 11n Tcvr PA BB/MAC Embedded CPU Memory SDRAM mPCI radios PCI E Radios PCI E DDR1/2 Figure 2: Comparison of 802.11b/g versus 802.11n enterprise access points. The Dual PCI Express interfaces of the PowerPC 405EX not only prevent 802.11n throughput bottlenecks, they support multiple radio frequencies to enable differentiated service between high data rate and low data rate devices to guarantee maximum throughput of high-speed devices. Microwave Engineering Europe ● December 2008 ● www.mwee.com http://www.mwee.com
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