Microwave Engineering Europe - March 2009 - (Page 10) 10 FOCUS ON RADIO Decade tuning, wide IF instrumentation receiver By Daniel J. F. Cletheroe, Plextek Ltd., UK This paper describes the development of the receive section of an instrumentation transceiver. The radio is designed for high linearity, gain and phase flatness, and is capable of tuning from 0.4 to 4 GHz in 1 Hz steps with an IF bandwidth of 20 MHz. Its performance is intended to be capable of testing 2G, 3G, LTE, and WIMAX systems. A high first IF avoids multiple switched filters while maintaining good spurious performance. The design uses SMT packaged MMIC amplifiers and mixers, microstrip, coaxial resonator, and lumped element filter technologies and a high performance synthesiser architecture based around off-the-shelf VCOs. A 16 bit 130 MHz ADC takes the signal into the digital domain for final down conversion to complex base-band. Two high performance FPGAs are used for this processing and also implementation of digital equalisation and applying calibration offsets. A high speed serial link to further processing is available for further filtering and software defined demodulators. Introduction The receiver that is to be described is designed for high flexibility. Instead of switching many analogue filters and changing frequency plans depending on band of operation and type of transmission, a general purpose architecture has been chosen. Initial goals are to allow testing of 2G, 3G, LTE, and WIMAX standards at any frequency in the range of 0.4 to 4 GHz but the intention is to allow any other standard or bespoke communication scheme by providing a high bit rate data link to a digital back-end that implements the demodulation. Other key design goals include dynamic range and response flatness. It is designed with good back-off from compression throughout the receiver to minimise distortion to high order modulation schemes, to withstand 20 W without damage, and to have enough sensitivity to allow 2G/3G testing down to -70 dBm. Careful design of the analogue IF filters achieves a good combined amplitude and group delay variation of ±0.6 dB and ±6 ns across the 20 MHz. Digital processing is then used to implement equalisation filters and further channel filtering when necessary. This processing can also apply gain correction to allow a high absolute accuracy after calibration with a high precision power meter or reference. The development has been under tight commercial time scales using a large number of off-the-shelf components. Construction The receiver was built on a PCB with 8 copper layers using Rogers 0.508-mm 4350B material top and bottom, 2 middle layers of 0.102-mm FR4 laminate, and prepreg between each laminate. This balanced construction minimised warping and gave an overall thickness suitable for standard end launch SMA connectors for the high frequency connections. A well controlled dielectric with low loss and solid ground plane is needed for the high frequency, high accuracy printed circuits. The Rogers material provides this while being compatible with standard PCB manufacturing processes. The inner layers allow complex control line routing. Figure 1 shows a section of one PCB. MMIC amplifiers, GaAs FET and diode mixers, VCO modules, splitters, lumped elements, and digital control components were all surface mount and the boards built by machine. The circuit boards are enclosed top and bottom with milled aluminium housings to keep a high level of isolation across filters and prevent interference. Water cut microwave absorbing material is fitted into the cavities to reduce unwanted resonances where necessary. Some connectorised parts were also used: high power attenuators and loads, electromechanical switches and attenuator, microwave filters, and directional couplers. Using a 20 dB coupler in front of the receiver enables the input to withstand 20 W without the need for a limiter. The transceiver was designed so that multiple units can be chained together and this was achieved using the wide band directional couplers on the transmit and receive chains. Frequency plan As can be seen in figure 2 the design uses a high first IF (9 GHz) followed by two down Figure 1: Section of pcb showing low and band pass microstrip filters. Figure 2: Block diagram of receiver. Microwave Engineering Europe ● March 2009 ● www.mwee.com http://www.mwee.com
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