Microwave Engineering Europe - March 2009 - (Page 20) 20 WIRELESS INFRASTRUCTURE Existing RNCs simply are not designed to interconnect with the very large numbers of NodeBs involved in small cell networks. Although theoretically standardized, many Iub interfaces include proprietary elements. Leased lines are impossible for a mass-market deployment, yet conventional architectures are not suited to the contended, asymmetric nature of mass-market broadband links. Perhaps most importantly, many of the radio control functions to date provided by the RNC — for instance deciding what radio channels to use or packet scheduling — need to be provided locally in the femtocell itself. This is addressed in a femtocell access point (or FAP) by moving most of the functions of the RNC and controller into the NodeB itself. The femtocell therefore needs to support not only the air interface, but also radio resource control, user plane ciphering and packet data convergence protocol (PDCP) — see figure 1. For this reason, a femtocell SoC such as the PC302 needs to be much more than simply a cost-optimized, ‘hardened’ version of the WCDMA PHY of a NodeB. It needs to incorporate considerable processing power and accelerators to enable execution of the RNC stack functions. Moreover, it needs the right kind of processing power — a blend of signal processing for the PHY, and control plane and network processing for the stack. To satisfy these needs, for example, the PC302 includes both a PHY processing and an ARM 11 subsystem suitable for running the stack, provisioning and security. Designed to cope The femtocell then connects back to a dedicated femtocell gateway (FGW) into the core network that is designed to handle huge quantities of access points. This interface is designed to cope with the security, provisioning and network constraints and uses a protocol specifically defined by Femto Forum and 3GPP called Iuh (the ‘home’ version of the existing Iu interface that goes from RNC to the core). Because of the change in the way tasks are partitioned in the network, the femtocell chip needs to provide enhanced security features for authentication, location detection, encryption and the prevention of DoS attacks. In addition to IPSec (IP Security) and secure real-time transport protocol, facilities are required to accelerate Kasumi (also termed A5/3), the 3GPP block ciphering system used for confidentiality and integrity: the PC302 includes hardware accelerators for this purpose. It is worth stressing that because of the critical importance of security the baseband Microwave Engineering Europe ● March 2009 ● device itself needs protection. Use of a system such as the ARM TrustZone regime allows secure key transactions, certificate transactions and authentication of software processes. Onetime programmable keys within device can be used to enable encrypted boot and other authentication functions. As important as minimizing the cost of the baseband device is the need to simplify and cost-reduce the radio sub-system. A glueless interface between the radio and the baseband chip eliminates the need for external components (typically FPGAs) to implement functions such as interpolation and decimation filtering. The PC302, for example, includes a very flexible interface supporting both parallel bus and LVDS interfaces for this purpose, allowing direct interconnection with radio components such as Maxim’s MAX2547 and MAX2599 devices as well as the upcoming Femto Forum baseband-radio interface. In the case of the PC302, the transmit path in the RF interface includes filtering to produce the spectral shaping required by TS25.104. Transmit power is controlled by a low-latency power control loop. The receive paths also include filtering to provide the appropriate spectral shaping and contribute to blocking of adjacent channel interference. An automatic gain control function is also included. A key point to note for the designer is the need to ensure that the radio components support sniffer functionality for both 2G and 3G, to enable self-organizing capabilities. As well as core network architecture issues, a new requirement is the need to provide tight synchronization between femtocells and the rest of the network, to mitigate radio interference, facilitate hand-over and ensure quality of service. Again, the need within the femtocell SoC is to eliminate the cost, power consumption and complexity issues introduced by the need to use traditional synchronization components (rubidium oscillators, oven-stablized crystals and the like). Solutions commonly used are the cost-effective techniques of network-based timing: either precision time protocol (PTP) specified within IEEE1588 or the long-established network time protocol (NTP) used for internet communication. Both of these protocols require hardware support in silicon, for example for time stamping. An alternative is the use of GPS, which has the attraction of providing timing as well as location data, which may be mandatory for regulatory reasons. Normally we think of GPS not working indoors, but the combination of assisted GPS (A-GPS), new designs and changing the requirements and hence architecture (for example www.mwee.com a femtocell GPS need not worry about movement or swift updates) can dramatically increase sensitivity to work deep indoors. Clock source flexibility In addition, designers require flexibility in terms of clock source — for instance clocks for the PC302 can either be generated from an on board numerically controlled oscillator (NCO), or via external voltage controlled oscillators (VCXOs) controlled by on-chip sigma-delta DACs. As operators push for early deployment of femtocells, technology providers are seeing with more clarity just what a challenge they face in producing this new generation of infrastructure equipment. The imminent delivery of robust, high-quality, integrated baseband solutions will help manufacturers along the road. But they will also need to adapt their mindset and borrow from the long-standing habits of consumer product manufacturers. Ease-of-use, low cost and low power consumption are just a few of the must-have attributes that are taken for granted in such markets. Not far away must be the next level of sophistication typically enabled by silicon integration, in the shape of reduced time-to-market, enhanced product differentiation, and even more intense cost pressure. The picoChip PC302 The PC302 from picoChip is a single-chip solution for HSPA femtocells compliant to 3GPP’s Release 8 femtocell specifications, such as TR25.820 and the Iuh interface. Supporting up to four users for residential and SME femtocell access points and with data rates of 14.4 and 5.7 Mb/s in downlink and uplink respectively, it claims to enable the lowest bill-of-materials and lowest power for a femtocell available today. The PC302 is based on a version of the company’s widely-deployed softwaredefined WCDMA femtocell solution, which has been “hardened” into a genuine SoC implementation for maximum performance and lowest cost. As such, it embodies the proven reliability and “carrier class” robustness. It includes all of the network integration and encryption and security features needed by femtocell designers. Timing and network synchronization functions are provided on-chip, and the device is designed to interface cleanly with commonly used radios via LVDS or parallel connection, with support for the Femto Forum’s new radio interface. http://www.mwee.com
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