EE Times Under The Hood - October 8, 2007 - (Page 15) ADVERTORIAL DesignPerspective Unlimited possibilities Designing for high-volume, low-power applications. Altera® Cyclone® III low-cost FPGAs deliver an unprecedented combination of low power, high functionality, and low cost. Manufactured using the Taiwan Semiconductor Manufacturing Company’s (TSMC’s) 65-nm low-power (LP) process technology, these devices consume very low power, often for a lower total cost than ASICs. Cyclone III FPGAs are part of our complete design solutions portfolio, ideal for your cost-sensitive, high-volume applications. What is the Cyclone III FPGA family? The 65-nm low-cost Cyclone III family is a low-power, high-functionality FPGA family supporting a wide range of costsensitive high-volume applications. Eight devices ranging from 5K to 120K logic elements (LEs) offer up to 4 Mbits of memory, up to 288 embedded 18 x 18 multipliers, and a wide range of lowcost packages. What is unique about Cyclone III FPGAs? Cyclone III FPGAs offer an unprecedented combination of low power consumption, high functionality, and low cost. Altera also offers the most complete and productive development tools with the free Quartus® II Web Edition software version 7.0 . Together, the productivity of the tools and the rich logic, digital signal processing (DSP), and memory resources of the Cyclone III family enable designers to choose programmable logic over ASICs or ASSPs for more high-volume applications than ever before. When will Cyclone III devices be available? The first Cyclone III devices are shipping now. All Cyclone III devices will be shipping in production by the end of 2007. You can begin your designs now using Quartus II software version 7.0. What is the power consumption strategy behind the Cyclone III family? Cyclone III FPGAs deliver low power consumption due to TSMC’s 65-nm low-power (LP) process technology and the unique power management features in Quartus II software. TSMC’s LP process ensures low power consumption with a low leakage current, allowing operation in thermally challenging environments, eliminating or reducing cooling system costs, and extending battery life for portable applications. Further process advances include the use of low-k dielectrics and multiple threshold voltages. Quartus II PowerPlay power analysis and optimization technology supports accurate analysis of dynamic and static power consumption, and pushbutton optimization of dynamic power consumption, while meeting speed and area requirements. Using these innovative techniques, Cyclone III FPGAs reduce power by up to 50 percent compared to the previous generation 90-nm Cyclone II FPGA family. What new applications do Cyclone III devices enable? Cyclone III devices are ideal for highvolume applications in all market segments. Examples of what engineers can achieve exclusively with Cyclone III devices include: • Broad range of new wireless applications, including bit rate, OFDMA symbol rate, and IF processing functions in wireless pico basestations • Software-defined radio (SDR) waveform integration in a single device for less than 0.5 W of static power • Video and image processing applications, such as integrating a four-channel H.264 standard-definition encoder in a single chip • Display applications, with the first low-cost FPGA support for all 1080p HDTV performance requirements How do Cyclone III devices compare with Cyclone II devices? Compared to the previous generation built on the 90-nm process, the 65-nm Cyclone III family delivers: • 1.7X more logic • 3.5X more embedded memory • 2X more embedded 18 x 18 multipliers • 20 percent lower cost per LE • 50 percent lower power consumption • Low-cost configuration options • Support for faster external memory interfaces • More I/O and phase-locked loop (PLL) flexibility
For optimal viewing of this digital publication, please enable JavaScript and then refresh the page. If you would like to try to load the digital publication without using Flash Player detection, please click here.