EETimes India - September 1-15, 2008 - (Page 3)

News Emerging trends require new test tools continued from page reconfigurable, high-performance automated test systems. The third is the growing popularity of FPGA-enabled instrumentation as more manufacturers are including FPGAs on modular instruments and giving engineers the access in software to reprogram them according to their requirements. For example, test engineers can embed a custom algorithm into the device to perform in-line processing inside the FPGA or emulate part of the system that requires a real-time response. New system-level tools are emerging that provide engineers with the ability to rapidly configure FPGAs without writing low-level VHDL code. As electronic devices become more complex, testing will become more integrated in the design process and user-defined measurements will become even more important. The fourth is the explosion of wireless standards. RF and wireless traditionally have been very specialised fields, but the industry is experiencing a trend where wireless capability is being integrated into more products. This growth in adoption requires test engineers to learn wireless protocols and keep pace with the rapid introduction of new standards. This trend was reflected WiMAX. A critical part of keeping up with these new technologies is a test platform that engineers can rapidly reconfigure to test any wireless standard. Discuss Are test engineers an endangered species? With DFT and DFM methodologies rapidly absorbing test and manufacturing awareness into the core design group, what’s the future for the test guy in the corner of the lab? in a 2007 salary survey, in which subscribers across engineering disciplines were asked to identify the top technologies they are being required to learn. Among the top responses were WLAN and SoCs, SiPs The last is emulation-based ATE that improves SoC and systemin-a-package (SiP) testing. As semiconductor devices become more complex, the process of testing each part completely with a traditional vector-based methodology is increasingly difficult. Complex SoCs and SiPs require a system-level functional test more closely related to testing components placed on a PCB than a typical chip test, but they still require the high speeds demanded in production test for the semiconductor industry. The strategy of testing a device by emulating actual realworld signals provides a better method of functional test for these types of high-speed systems. This lowers the total cost of test through better use-case coverage and improves the user’s ability to debug failures. As we look to the future, there is great promise for software that integrates the design and test tools used throughout product development. Over the last 20 years, the focus of design and test software has been on addressing the needs specific to each of the traditional phases of product development. By taking on the task of bridging the worlds of design and test and the traditional phases of product development, advanced tools can help engineers increase their productivity as they address future product development challenges. Online FP G A s , m u l t i - co r e, P C I e a d v a n ce virtual test Emulation wins over FPGA prototyping EETI_mother.indd 1 1/14/08 5:17:49 PM 3 EE Times-India | September 1-15, 2008 | www.eetindia.com http://www.eetindia.co.in/SEARCH/SUMMARY/technical-articles/WiMAX.HTM?ClickFromNewsletter_080901 http://www.eetindia.co.in/SEARCH/SUMMARY/technical-articles/SoC.HTM?ClickFromNewsletter_080901 http://forum.eetindia.co.in/FORUM_POST_1000039250_1200087027_0.HTM http://www.eetindia.co.in/ART_8800504346_1800003_TA_77b3642c.HTM?ClickFromNewsletter_080901 http://www.eetindia.co.in/ART_8800497522_1800000_TA_055dcf7a.HTM?ClickFromNewsletter_080901 http://www.eetindia.co.in/SEARCH/SUMMARY/technical-articles/WLAN.HTM?ClickFromNewsletter_080901 http://www.eetindia.com http://www.eetindia.com http://www.eetindia.com http://www.eetindia.com/STATIC/REDIRECT/Newsletter_080901_EETI02.htm?ClickFromNewsletter_080901

Table of Contents Feed for the Digital Edition of EETimes India - September 1-15, 2008

EETimes India - September 1-15, 2008 Contents National Semiconductor Get the Low Down on IEEE 1588 Clock Synchronisation Tech Insights DigiKey Combine Techniques to Reduce ICT Cost, Complexity Microchip Technology National Instruments SME, Educational Programmers Show How NI�Cares Texas Instruments

EETimes India - September 1-15, 2008

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