EETimes India - November 1, 2008 - (Page 3)

Trends Multi-core SoCs challenge interconnects continued from page 1 individual components and the system architectures they implement. Where once a board held one complete computing system, today many such systems are present on a single device. The transition to SoC devices changes the requirements for interconnects used between SoCs and other devices and networks. Board and system-level interconnects were initially shared busbased. As with past processors, the demand for more interconnect performance was addressed in a similar fashion: Increase the clock rate and widen bus widths. As with processors, physics eventually intervened, demanding that the number of devices on the bus be reduced. This led to bus segmentation, hierarchical topologies and, ultimately, point-to-point, switch-based networks. Embedded systems are often partitioned into three sub-system functions: control plane, data plane and system management. When a system consisted of one computing system, the number of system-level traffic streams was limited. This was fortunate because available bus-based interconnects accommodate just a single traffic stream. To improve system performance, a dedicated processor was applied to each function. This quickly introduced qualityof-service (QoS) issues as multiple concurrent communication streams arose. In many cases, three separate interconnects were used to optimise bandwidth and prevent undesirable interaction between individual streams. In these systems, each processor performs a single function and is responsible for a single or multiple traffic streams. However, a multi-core SoC dramatically changes this picture. Many streams of traffic per chip can now be expected as each core handles its own streams. Expect the near-term challenge of parallelising existing code to drive the convergence of control, data and management plane functions onto a single multi-core SoC as a stopgap use of multi-core architectures. This will give rise to at least three or more streams on a four-core device. In the longer term, software will become multi-core-friendly and swing back to many cores performing discrete data or control plane functions. In either case, multiple traffic streams will be present wherever multi-core SoCs are employed. With future SoCs using 8, 16 and even more cores, the number of streams supported by a single device will grow substantially in the next two to four years. Interconnect challenges Can current interconnects support multiple traffic streams? The simple answer is yes. Any number of streams may be sup- ported by multiplexing them before transmission across a single interconnect. But how do you de-multiplex the streams at the destination and how do you give each stream unique service parameters, such as guaranteed bandwidth and average or worstcase latency? To address these issues, certain protocol features are required. First, the protocol must allow differentiation of individual streams. Second, it must be possible to enforce service parameters as packets cross the interconnect. Read the full article to know more about these requirements, and to learn how interconnect protocols like Ethernet, PCIe and RapidIO apply to multi-core devices. | Online Three design models for multi-core systems Par tition multi-cores for embedded networking Datasheets Online Looking for parts to specify for your design project? Browse through thousands of datasheets organised by category, by manufacturer, and alphabetically. Search using keywords or part number to quickly access datasheets. Part No. MC074 ACF2101 AD202 LTC912-1 ADC0808 ADS1255 AD171 NUF2042XVT1G LTC55 54ACT245 Description Single supply V to 44V, quad operational amplifier Low noise, dual switched integrator Low cost, mini isolation amp powered from +15V DC supply Dual programmable gain amplifiers with serial digital interface 8-bit microprocessor compatible ADCs with 8-channel multiplexer Very low noise, 24-bit analog-to-digital converter (Rev. I) Complete 12-bit 1.25 MSPS monolithic A/D converter USB upstream terminator with ESD protection 00MHz to 7GHz precision RF detector with fast comparator output Octal bidirectional transceiver with tri-state inputs/outputs (Life-time buy) Manufacturer ON Semiconductor Texas Instruments Analog Devices Linear Technology National Semiconductor Texas Instruments Analog Devices ON Semiconductor Linear Technology National Semiconductor Get more Datasheets Online… EE Times-India | November 1-15, 2008 | www.eetindia.com http://www.embeddeddesignindia.co.in/ART_8800549678_2800003_TA_80f6a8bd.HTM?ClickFromNewsletter_081101 http://www.embeddeddesignindia.co.in/article/sendInquiry.do?articleId=8800549678&catId=2800003?ClickFromNewsletter_081101 http://www.embeddeddesignindia.co.in/article/emailToFriend.do?articleId=8800549678&catId=2800003?ClickFromNewsletter_081101 http://www.embeddeddesignindia.co.in/ART_8800532820_2800001_TA_a236c0ff.HTM?ClickFromNewsletter_081101 http://www.embeddeddesignindia.co.in/ART_8800536126_2800001_TA_2f908f1e.HTM?ClickFromNewsletter_081101 http://www.eetindia.co.in/DATASHEET/DETAIL/MC33074-1000026705.HTM?ClickFromNewsletter_081101 http://www.eetindia.co.in/DATASHEET/DETAIL/ACF2101-1000043664.HTM?ClickFromNewsletter_081101 http://www.eetindia.co.in/DATASHEET/DETAIL/AD202-1000039246.HTM?ClickFromNewsletter_081101 http://www.eetindia.co.in/DATASHEET/DETAIL/LTC6912-1-1000043585.HTM?ClickFromNewsletter_081101 http://www.eetindia.co.in/DATASHEET/DETAIL/ADC0808-1000025033.HTM?ClickFromNewsletter_081101 http://www.eetindia.co.in/DATASHEET/DETAIL/ADS1255-1000043702.HTM?ClickFromNewsletter_081101 http://www.eetindia.co.in/DATASHEET/DETAIL/AD1671-1000039178.HTM?ClickFromNewsletter_081101 http://www.eetindia.co.in/DATASHEET/DETAIL/NUF2042XV6T1G-1000038449.HTM?ClickFromNewsletter_081101 http://www.eetindia.co.in/DATASHEET/DETAIL/LTC5536-1000043528.HTM?ClickFromNewsletter_081101 http://www.eetindia.co.in/DATASHEET/DETAIL/54ACT245-1000025026.HTM?ClickFromNewsletter_081101 http://www.eetindia.co.in/DATASHEET/INDEX.HTM?ClickFromNewsletter_081101 http://www.eetindia.com/STATIC/REDIRECT/Newsletter_081101_EETI02.htm?ClickFromNewsletter_081101

Table of Contents Feed for the Digital Edition of EETimes India - November 1, 2008

EETimes India - November 1, 2008 Contents National Semiconductor Managing Threads, Communications in Multicore Partitioning Texas Instruments DigiKey Improve Multi-core Hypervisor Efficiency NECE 2008, Power India 2008, CSF: Electronics & Components, Wind India 2008, User2User 2008 India, National Conference On E-Governance

EETimes India - November 1, 2008

For optimal viewing of this digital publication, please enable JavaScript and then refresh the page. If you would like to try to load the digital publication without using Flash Player detection, please click here.