EETimes India - December 16, 2008 - (Page 9)

In Focus | DSPs Use comparators for mixed-signal apps continued from page Events TES 2008 Dec. 16-18, 2008 Bangalore R2 should be equal in value. In the AND configuration, both A and B must be high to pull the non-inverting input above the VDD/2 point, which causes the output to go high. In the OR configuration, either A or B must be high to pull the non-inverting input to VDD/2, which will pull the output high. To make either the NAND or NOR, simply swap the inverting and non-inverting inputs. The circuit on the right in figure 2 is used for the XOR circuit. If either A or B is low, then the inverting input is clamped to 0.7V and the other high input generates a high output. If both A and B are high, then the input at the non-inverting input is held slightly below VDD, while the inverting input is pulled to VDD—resulting in a low output. Note that for any of the logic circuits, the resistor values chosen should be large enough to keep all currents in the 1-10mA range so the output drive in the comparator can drive the logic easily. The TiE Entrepreneurial Summit this year includes a Technology track with sessions on leveraging IT, mobile communications, aviation and energy management (see conference details). The event offers the possibility of mentoring sessions upon request (send request). Learn more. NCMIPMV ‘08 Dec. 22, 2008 Rajalakshmi College of Engineering, Chennai Figure 4: Boost topology switching power supply using two comparators. the inverting topology, R7 and R8 are needed to generate the virtual ground for the circuit. Switching power supply Finally, how about a switching power-supply circuit? One method for generating an alternate supply voltage is to generate a PWM switching signal that is gated by voltage feedback from the output. In this circuit, one comparator generates a ramp waveform, and a second provides the feedback from the output voltage (figure 4). Low-frequency op amp Next, let us examine how a comparator can be used as a low-frequency operational amplifier. Any variable-duty-cycle digital signal can be converted into a DC voltage by simply filtering the pulse chain through a sufficiently low-frequency lowpass filter. To make an op amp out of a comparator, we will use this same averaging capability of the filter for generating both the feedback and output voltages (see figure 3). In the non-inverting circuit, R1 and R2 fix the gain just as in a normal op amp circuit. C1 and R3/C2 act as filtering to average the PWM digital signal at the output of the comparator, and use it as a DC level for feedback and the linear output of the circuit. In the inverting circuit, R4 and R5 fix the gain, and C3 and R6/C4 act as the averaging filters to translate the digital PWM to linear voltages. Note that in Discuss Op amps or comparators? Op amps may be much cheaper than comparators but they pose difficulties when it comes speed, logic drive and input structures. Which one will you use? In this circuit, comparator U1a is a pulse generator—similar to the sensor-to-digital oscillators shown in figure 1—operating at a frequency determined by R4, R5 and C1. R5 is included in the circuit so that the charge voltage on C1 never goes lower than about 1.5V. This is important because U1b controls the operation of the oscillator by pulling the non-inverting input of U1a to approximately 0.7V, which shuts off the oscillations. Note that the oscillator is designed to pull its output low when turned to off, so Q1 will also be shut off. When the oscillator is running, Q1 is regularly turned on, building up a current flow in L1. When Q1 is turned off, the current flow in L1 forward biases D3 and charges C2—charging up the output voltage. A sample of the output voltage on C2 is then scaled and compared to the forward voltage of D2. If the output voltage is too high, U1b shuts off the oscillator and the C2 discharges into the load, dropping the output voltage. When the output voltage falls below the desired voltage, the output of U1b goes high and the oscillator restarts, pumping current back into C2. There you have it: circuits for converting R/C/L sensor outputs into digital values, logic gates, amplifiers, and even switching power supplies, all built out of discrete components and comparators. The next time you are searching for a microcontroller and you see a part with voltage comparators, take a minute and think about the complex functions you could build with these humble devices—for a lower materials cost. Online Choosing a microcontroller and other design decisions Using op amps with data converters Attend the National Conference on Multimedia, Image Processing and Machine Vision to learn from research papers on multimedia applications, signal processing, security, image processing techniques and algorithms and machine vision. Go to event website or send an inquiry now. ICACT ‘08 Dec. 26-27, 2008 Gokaraju Rangaraju Inst. of Engg and Technology, Hyderabad The International Conference on Advanced Computing Technologies covers a wide range of computing techniques such as statistics, data mining, VLSI, nano computing, parallel computing and mobile computing. Visit website or inquire direct. VLSI Conference 2009 Jan. 5-9, 2009 Hotel Taj Palace, New Delhi Conference session this year include low-power design, SoC verification, analogue/mixedsignal design, floorplanning, system synthesis, test generation, device modelling and embedded systems. Attend the Made for India forum that celebrates designs targeted at the Indian market. Go to website or inquire now. ICETiC 2009 Jan. 8-10, 2008 Kamraj College of Engineering and Technology, Virudhunagar Topics covered by the International Conference on Emerging Trends in Computing include active networks, AI, agent computing, data and information security, genetic algorithms, multimedia systems, knowledge-based systems, medical informatics, mobile computing, parallel and distributed systems, pattern recognition, and soft computing techniques. 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Table of Contents Feed for the Digital Edition of EETimes India - December 16, 2008

EETimes India - December 16, 2008 Contents National Semiconductor Data Plane Processing Challenges DSP Design, Debug with DSPs TES 2008, NCMIPMV '08, ICACT '08, VLSI Conferene 2009, ICETiC 2009

EETimes India - December 16, 2008

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