IEEE Circuits and Systems Magazine - Q1 2018 - 15

-0.5 (FA + FF)/log2(10-y/20/7)

Highest Remez Order that Can Be Practically Realized

1,000
Log Scale
1,000
100
100
Z
X
10

10

Y

0
20,000 18,000 16,000
14,000 12,000 10,000
Complexity (FA + FF)

80

8,000 6,000 4,000
2,000

70

60

50

40

30

20

90
100
-20log10min(δp, δs) in dB

(a)

Highest Remez Order that Can Be Practically Realized

-0.5 (FA + FF)/log2(10-y/20/7)

400

400
350

350

300

300

250

250

200
200
150
150

100

100

50
0
5,000

4,000

3,000

2,000
1,000
Complexity (FA + FF)

100

80

60

40
X

-20log10min(δp, δs) in dB

20
Z

50

Y

(b)
Figure 3. graphical illustration of the practical hardware complexity bound in (12) ^a = 1 h both in linear and log scales. the z-axis
represents the highest order of the practically realizable fIr filter as a function of the hardware budget (x-axis) and filter spec
(y-axis).

fIrst quArtEr 2018

IEEE cIrcuIts ANd systEMs MAgAzINE

15



Table of Contents for the Digital Edition of IEEE Circuits and Systems Magazine - Q1 2018

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