IEEE Circuits and Systems Magazine - Q2 2018 - 57

IV. Fading Memory Effects in Real-World
Nonvolatile Memristor Nano-Devices
In this section we shall show how physical resistance
switching non-volatile memories [23], which are essentially non-ideal memristors with limited state existence
domain and asymmetric on- and off-switching kinetics,
are subject to progressive memory loss under DC as well
as AC periodic driving, despite they may store the information embedded in their state indefinitely at power off.
Remark 3: It is important to stress that, in general, the AC
fading memory phenomenon is not induced by the limited
state existence domain of real-world memristors. Furthermore, despite, due to the space restriction, in the sections
to follow we shall only consider typical periodic inputs-
e.g. single- or multi-tone sine-waves, and triangular waves-
to stimulate the nano-devices and induce their progressive
memory loss, the history erase effect has been observed
under a very wide class of AC periodic excitations.
Let us first focus on the TaO memristor manufactured
at HP Labs.
A. The Tantalum Oxide Memristor
from Hewlett Packard Labs
In a real-world nano-device fabricated at HP Labs-Fig. 10
shows its dimensions and constitutive materials-a critical channel based upon tantalum oxide is sandwiched
between two electrodes composed of inert platinum and
active tantalum, respectively. The resistance of the channel, in which the oxygen-deficient inner core typically
features a much higher conductivity than the oxygenrich outer shell, may be modulated by the application of
a voltage across the device.
The ordinary differential equation governing the time
evolution of the state of this memristor, proposed by
Strachan et al. on the basis of physics' laws [17], may be
cast in the following form:
dx = g (x, v )
m
dt
x2
1
= A · sinh ` v m j exp c - off
m exp c
m
v off
1 + b · im · vm
x2
2
v
· step (- v m) + B sinh ` m j exp c - x2 m
v on
x on
i
m · vm
· exp c
(20)
m step (v m),
vp

where the state x, denoting the fraction of the channel
cross-sectional area occupied by the conductive core,
sEcOnd quartEr 2018

x0 = 9 Ω
x0 = 8 Ω
x0 = 7 Ω
x0 = 6 Ω
x0 = 5 Ω
5
x0 = 4 Ω
x0 = 3 Ω
0
0
0.5
1

x/Ω

10

1.5

2

2.5

t /s
(a)
100
zim z/A

is merely due to the boundary conditions imposing the
memory state confinement within the closed interval
x ! [x on, x off]. Much more interesting is the local fading
memory emerging in memristors with multi-stability
(see section V for details).

10-2
10-4
-3

-2

-1

0
vm /V
(b)

1

2

3

Figure 9. Fading memory in Pershin's model under the same
ac periodic excitation of Fig. 8(a) but for initial conditions
which do not prevent the state from hitting the lower bound
within the first input half-cycle. (a) History erase effect emerging
in the memory state response due to the boundary conditions. (b) steady-state sea-gull alike [54] log 10 ( i m ) -v m hysteresis loop observed for all initial conditions within the set
x 0 ! " 3, 4, 5, 6, 7, 8, 9 , X.

Pt (80 nm)
Ta (10 nm)
Al2O3 (55 nm)
TaOx (4-6 nm)
Pt (80 nm)
Ta (10 nm)
SiO2 (200 nm)
Si
Figure 10. cross-sectional view of the layer stack in a tantalum oxide-based nano-scale memristor fabricated at HP
Labs on a total area of 1.5 μm × 1.5 μm. reprinted with permission from [33], copyright 2016, IEEE.

is constrained to lie in the closed set [0, 1] at all times.
Moreover, the input- and state-dependent Ohm law predicted by Strachan's model [17] is described by
i m = G (x, v m) v m
= ` G m x + a exp ` b

v m j (1 - x) j v m,

(21)

The physical meaning of each of the parameters in
Strachan's DAE set (20)-(21), whose values are reported
in Table I, is well explained in the seminal paper from
Strachan et al. [17].
IEEE cIrcuIts and systEms magazInE

57

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