IEEE Circuits and Systems Magazine - Q2 2018 - 93

Addressing
Power

Analogue
Clock
References Generation

Camera Control Block

Illumination
Source

Data Interface

Input

A

Control Interface

Memory Bank

Data Processing

ADC

Readout Circuitry

Sensing Array

On-Chip Color Filter

Lens

State/Output

Image Sensor

B
z

Internal
Image Plane

Lscene

Scene
Element

Sensor
Front-End

Output
(Digitized) Image

Figure 2. cIss and cVIss are front-end chips that embed photo-sensor arrays to capture scenes focused on the chip surface.
cIss produce electrical images consisting of digitized raw pixel data (bottom-right side in the figure-adapted from [39]). cVIss,
include processing structures in the focal plane to perform spatial/temporal tasks concurrently with acquisition, thus producing
pre-processed, compressed images (top-right inset). Eye-rIs™ is a trademark of anaFocus Ltd [20].

images and delivers data for subsequent processing
by digital processors. However, it is well known that raw
pixel data are largely redundant, and that information
contained into images can be extracted from reduced
subsets of the spatial samples [22]. Consequently, vision
systems architectures employing CISs at the front-end
must read, encode, transmit and store myriads of irrelevant data.
However, CVISs are information-centric front-ends
conceived to deliver information, instead of raw data
[23]-[33]. Therefore, using CVISs at the front-end of visions systems yields smaller SWaP and larger throughput, as required for wireless sensor networks, unattended surveillance networks, automotive, low payload
UAVs, visual prosthesis and internet-of-the-things, and
in general whenever portable vision is required.
While CISs are solid industrial assets, CVISs are still
lagging behind regarding industrial exploitation. Among
other obstacles, they are lacking standardization. However, their concept has been already demonstrated
sEcOnd quartEr 2018

through many silicon implementations and their industrial use is starting to ramp up [20].
II. CNNUM-Based Visual Microprocessors
The Vision Processing Chain
Retinas are considered key for the outstanding performance of natural vision systems [34], [35]. It is hence
arguable that artificial vision systems will largely benefit from using front-ends with architecture and operation similar to retinas. Actually, many CVISs are named
silicon retinas in the literature [36]-[38]. Retinas contain
photo-receptors and dynamically-coupled processing
cells of different types. They are able to complete complex spatial/temporal processing tasks to extract relevant information from the incoming sensory data, thus
reducing the amount of data before transmitting them
for subsequent processing. This data reduction strategy
is justified by the specifics of the processing chain of vision-illustrated in Fig. 3.
IEEE cIrcuIts and systEms magazInE

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