IEEE Circuits and Systems Magazine - Q3 2018 - 18

Using a differential signal path helps maximize
the preamplifier immunity to noise from
the power supply and substrate.

[68], [72] is not accurate. A DC photocurrent rejection
TIA with sample-and-hold (S/H) in the feedback loop
was introduced in [73]. The additional S/H block helps
to detect the pulsed signal average accurately. Using a
differential signal path helps maximize the preamplifier
immunity to noise from the power supply and substrate.
The photodiode, however, is connected to only one terminal. This creates an asymmetry at the input of the differential structure. As a result, an additional capacitor is
required at the other input of the transimpedance amplifier in order to match the photodiode capacitance and to
rebalance the differential circuit. Perfect matching ensures that noise injected at the bias voltage appears as
a common-mode signal that is effectively rejected by the
differential structure. In practice, however, some mismatch can be expected, and additional measures such

Digital
Feedback

DRE
VCMI
Ist

Vout

+
-

ADC

Rf

IRes
Iph

Cf
Figure 18. A block diagram of the system on chip (soC) with
DrE for static photocurrent rejection [74].

Ma
Va

Vbulk

Vctrl2

Vctrl1

Vctrl

Ma
Va

Mb
Vb

(a)

Mb
Vc

Vb

(b)
Ma
Va

Mb
Vb
(c)

Figure 19. Mos pseudo-resistors: (a) common tunable Mos
pseudo resistor [76], (b) balanced tunable Mos pseudo resistor [76], and (c) Mos-bipolar pseudo resistor [78].
18

IEEE CIrCUITs AND sYsTEMs MAGAzINE

as adding an on-chip tuning capacitor may be required
to improve matching.
A block diagram of the implemented PPG SoC system
introduced in [74] is shown in Fig. 18. It consists of an integrate-and-hold amplifier, a dynamic range enhancement
(DRE) current source, a 9-bit successive approximation
(SAR) ADC, and a digital core to supply feedback and control signals to the analog blocks (not shown for simplicity), such as the sampling switch at the negative terminal
of the op-amp and the reset switch across the CF [74].
The DRE circuit generates a current (Ist), which subtracts
the static component of the photocurrent (Iph), and the
residue (Iph-Ist) is integrated by the integrate-and-hold
amplifier. Clean PPG data can be accessed from the SoC
by using a standard SPI protocol, allowing for easy interfacing with low-power microcontrollers. However, this
DRE technique is very complex and requires more area
for the digital part compared to the analog solutions.
C. PPG Low Frequency Contents
The PPG signal has a low frequency of about 0.5 Hz and
a high frequency up to 5 Hz. Therefore, the AGC and DC
photocurrent cancellation circuits need to be designed
with large time constants ^T = 1/RC h to have less than
a 0.5 Hz low cutoff frequency. In addition, the bandwidth
of the PPG amplification stage should be around 5 Hz to
reduce the out of band noise. This implies that large capacitances and large resistances must be implemented.
The total area of the resistor and capacitor will be quite
large. Some special techniques have been explored to
solve the above problems.
1) MOS pseudo-resistor
A resistance of hundreds of mega ohms can be achieved
when a MOSFET is biased in the subthreshold region. This
type of MOS resistor is commonly used together with a capacitor in biomedical applications for low cutoff frequency
[75]. Since tuning a resistor by trimming is inconvenient
and costly, a tunable MOS pseudo-resistor was proposed
[76], as shown in Fig. 19(a). The tolerable DC input voltage
range was measured to be 0.5 V. Considering that this MOS
resistor exhibits asymmetric and nonlinear resistance as
the voltage varies across it, [77] proposed a balanced tunable MOS pseudo-resistor in their programmable biomedical sensor interface chip, as illustrated in Fig. 19(b). The
two transistors can be turned on in an alternating manner
ThIrD qUArTEr 2018



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