IEEE Electrification Magazine - September 2013 - 35

Device
Snubber
dc Bus +

dc Bus +

Local
Snubber

Power Semiconductor

dc Bus -

Figure 3. Bidirectional SSPD architecture.
Mechanical Switch
(Leakage Current)
dc Bus

dc Bus

SSPD
Mechanical Switch
(High Current)

Figure 4. Galvanic isolation concept.

Galvanic Isolation Concept
Galvanic isolation of SSPDs is a vital feature for achieving
fault detection, isolation, and reconfiguration. To achieve galvanic isolation in an SSPD, physical isolation must be provided, and therefore, a mechanical method is required,
which is shown in Figure 4. This method requires a main
mechanical switch or contactor for the high current through
the SSPD (which opens after the semiconductors have interrupted the fault current) and a secondary mechanical switch
for interruption of the leakage current during isolation.

Protective Coordination Approach
The design concept for dc protective coordination using
IGCT- and IGBT-based SSPDs within a dc distribution system is implemented using restraint signals between
SSPDs. Along with using different SSPD trip levels,
restraint signals provide the communication between
SSPDs, resulting in proper coordination of the system
-during faults. Each SSPD makes coordination decisions

SSPD 1
Control Board

HCPG
Current
dc + In

Bus
Snubber

SSPD 2
Control Board

SSPD 1
(IGCT)

dc +
Out

dc + Out dc + In
SSPD 2 Bus
Snubber Voltage
V

SSPD 2
(IGCT)

Bus
Snubber

−
dc − In

dc − Out

SSPD 2
Current

dc +
Out

dc + In

SSPD 3
Current

SSPD 3 Bus Snubber Voltage

V
Bus
V Snubber
dc − Out

dc − In

SSPD 3
Control Board

Bus Bar Short

HCPG

A series arrangement of SSPDs was set up, as shown in
-Figure 5, and tested to illustrate proper coordination between
upstream and downstream SSPDs with a simplified threestage system. The testing was performed using a combination of three SSPDs in series-two IGCT-based SSPDs with the
same current trip level and a third IGBT-based SSPD, which is
farthest downstream, with a lower current trip level than the
two upstream SSPDs. Testing was performed using a high
current pulse generator (HCPG) source to mimic the effect of
dynamically stiff upstream power sources (as will be the
case in converter-fed distribution -systems).
For the test performed, the farthest downstream SSPD
had a current trip level lower than that of each of the
upstream SSPDs so that restraint signals were not needed
based on the large difference in current trip levels. However, other testing (not described here) was performed on
two-series SSPDs with the same current trip level, and
proper coordination was demonstrated between these
two SSPDs, validating the protective coordination method
using restraint -signals.
The test results of the fault interruption at the output of
the farthest downstream SSPD are shown in Figures 6 and 7.
The source inductance was 8 µH, and the test voltage was
800 V dc, resulting in a rate of rise (di/dt) of the current of
approximately 100 A/µs during the fault event. Based on the
test results, both series upstream SSPDs remained in the
conducting state when the farthest downstream SSPD was
closed into a fault at its output and tripped to interrupt the
fault current.

Current
Feedback

Hardware Validation-Coordination

Current
Feedback

= Fiber Optic Cable
High-Current Pulse

Restraint
Signals

locally and then, through the use of these restraint signals,
communicates its decisions to other connected upstream
and/or downstream SSPDs. This ensures that maximum
power continuity is provided and that isolation only
occurs at the location of the fault. Note that the restraint
signals are mainly required when series SSPDs have the
same or similar current trip levels.

SSPD 3
Input
Voltage
dc − In

SSPD 3
(IGBT)
dc − Out

Figure 5. DC coordination test setup.

IEEE Elec trific ation Magazine / s ep t em be r 2 0 1 3

Table of Contents for the Digital Edition of IEEE Electrification Magazine - September 2013