Printed Circuit Design & Fab - June 2008 - (Page 29)

SIGNAL intEGrity ! ! FiGurE 8. simulated eye diagram of with common mode noise. FiGurE 9. simulated eye diagram for parBeRT system under 2.125 Gbps input. The effect of common mode is not captured MoSin Mondal is a research assistant, ACe Lab, BrucE archaMBEault is distinguished engineer, PraVin PatEl is senior engineer and technical leader, SaMuEl connor is senior engineer, BhyraV Mutnury is circuit design engineer and MoiSES caSES is senior member of technical staff, all with IBM. Archambeault can be reached at barch@us.ibm. com. 2.125 Gbps. The corresponding eye height is 450 mV, which is slightly more than the value obtained by the parBERT measurement. It should be mentioned that the effects of two 30-inch SMA cables, two 6.5-inch SMP cables and SMA connector impedance mismatch have been ignored in the simulations. On the other hand, if the ground-to-ground noise is ignored in the signal integrity analysis, the eye diagram of FiGurE 9 with eye height of 510 mV is produced, which is 13% more than the actual value. Therefore, a conventional signal integrity analysis is unrealistic and produces optimistic results. rEFErEncES 1. M. Beattie and L. Pileggi, “Inductance 101: Modeling and extraction, ” in Proc. Design Automation Conference, pp. 323–328, 2001. 2. A. e. Ruehli, “equivalent Circuit Models for Three Dimensional Multiconductor systems, IEEE Transactions on MTT, vol. 22, pp. 216–221, ” Mar. 1974. 3. B. Krauter and s. Mehrotra, “Layout Based Frequency Dependent Inductance and Resistance extraction for On-Chip Interconnect Timing Analysis, in Proc. Design Automation Conference, pp. 303–308, ” 1998. 4. A. e. Ruehli, “Inductance Calculations in a Complex Integrated Circuit environment, IBM Journal of Research and Development, vol. 16, ” no, 5, pp. 470–481, 1972. Conclusions The effect of non-uniform common mode current return path on common mode noise in high speed differential signals is demonstrated in multi-board systems using both measured and simulated data. There are two points to be noted. First, because of non-ideal common ground connection, significant ground-to-ground noise appears between boards and affects signal integrity in multi-board systems. Signal integrity tools conventionally ignore this effect, which must be factored in for realistic analysis and design of such systems. Second, the amount of noise between reference planes in two adjoining boards depends on the inductance produced by the inter-board connector. Careful choice of the ground pin configuration can help mitigate the effect of common mode noise. pcd&f JUNE 2008 printEd circuit dESign & fAB 29 http://www.pcb-pool.com/ppus/info.html?PHPSESSID=7df48fa7c977776045ff8d4b24a70fc7 http://www.free-pcb-software.com http://www.pcb-pool.com/ppus/info.html?PHPSESSID=7df48fa7c977776045ff8d4b24a70fc7

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Printed Circuit Design & Fab - June 2008 Contents Our Line Market Watch Around the World Happenings ROI Tip Jar Interconnect Strategies Final Finish Forum DFA/DFT Signal Integrity From the Field DFA Fab Basics Drill Off the Shelf Marketplace Ad Index BGA Bulletin

Printed Circuit Design & Fab - June 2008

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