Printed Circuit Design & Fab - July 2008 - (Page 47)

www.efabpcb.com Easy to use instant on-line quoting If you have any questions or need assistance Call Toll Free 1-877-332-2722 or Contact – sales@efabpcb Prototypes thru Production Check out our low prices and save big $ Save more with our Proto-Power Pack Specials! Quality PCBs at competitive prices! Let us be your on-line PCB shop Lead free / RoHS finishes available ENIG – Immersion Silver – Immersion Tin – OSP – Lead Free Solder efabpcb is a UL-approved – ISO9001:2000 certified facility ADVERTISER INDEX To learn more about the advertisers in this issue, go to pcdandf.com and select “Advertiser Index” in the home page menu. This will provide you with a direct link to the Web site of each advertiser in this index. ADVERTISER Accutrace Advanced Circuits Alternative Finishing Bare Board Group Cam Expert LLC Circuitronix LLC Cisco Systems Inc. Compeq Danfoss Drives DownStream Technologies Electronic Reprints EMA Design Automation EzPCB Fine Circuits Front Panel Express Garrett Film Services Corp. Imagineering IPC Midwest 2008 JetPCB Inc. Korea PCB International MacDermid Mentor Graphics Midwest Accurate Grinding National Instruments/ Electronics Workbench Group Online Electronics PCB Basics PCB Fab Express PCB Orlando 2008 PCB UPdate PCB West 2008 PCB-Pool Precision Technologies Samtec Inc. Sierra Proto Express Sun Chemical Circuits Sunstone Circuits Superior Processing Taiyo America Inc. Technical Machine Products Virtual PCB PAGE # 44 45, 46 46 44 45 46 46 46 22 7 39 3 45 45 46 27 45 31 44 44 5 Cover 4 46 Cover 2 44 17 47 33 42 9, insert opposite 16 29 47 19 Cover 3 23 1 46 21 46 11 BGA Bulletin, continued from p. 48 The Diagonal Region. The pins along the diagonals could have conflicting patterns when the Region 1 and Region 2 fanouts merge. The example in FIGURE 6 shows a method that not only merges the patterns, but also spreads the vias away from the centerline, providing greater route density along the diagonal. Dividing up the BGA into regions enables maximum route density, and can thereby reduce the number of layers needed. When the BGA has over 1500 pins, simply routing out of the BGA tends to be the primary contributor to increased layer count. By varying the number of rows used in each region, based on the stackup and via spans available, you can obtain the most optimal fanouts and routing in the context of your own specific design. PCD&F CHARLES PFEIL is an engineering director for Mentor Graphics, Systems Design Division. He can be reached at charles.pfeil@mentor.com. Go to www.mentor.com/go/bga to obtain a copy of Charles Pfeil’s new book, “BGA Breakouts & Routing. ” The advertising index is published as an additional service. The publisher does not assume any liability for errors or omissions. JULY 2008 PRINTED CIRCUIT DESIGN & FAB 47 http://www.efabpcb.com http://www.pcbfabexpress.com http://www.eprotos.com http://pcdandf.com http://www.mentor.com/go/bga

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Printed Circuit Design & Fab - July 2008

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