Printed Circuit Design & Fab - September 2008 - (Page 18)

Electrodeposition of Copper, Part 3 Plating cell design can minimize the effects of primary current distribution. IN THE PREVIoUS CoLUMN, a broad Infinite Parallel Plane Electrodes overview of copper electrodeposition was presented. In this month’s feature, the functional aspects of miCHAEl electrodeposition CArAno will be presented in greater detail. It is critical to obtain a fundamental understanding of the plating process, including an in depth knowledge of the various additives, organic as well as inorganic. Additionally, mechanical factors such as agitation, operating temperatures, cathode current density and anode placement have influence on the plating process. As printed wiring board designs become increasingly more complex, with smaller diameter vias and greater panel thicknessess, the engineer faces a more difficult task with respect to optimizing plating distribution; this includes throwing power and the physical and cosmetic properties of the copper deposit. Optimizing the operation of the chemistry is a big task. The additives in the chemistry interact with the various mechanical aspects of the plating system. The rectifiers, anode to cathode relationship, filtration, agitation and plating by-product build-up influence the plating distribution and overall quality and reliability of the copper deposit as well. Taking this a step further, achieving plating thickness uniformity is largely dependent on primary and secondary current distribution. Primary Current Distribution Primary current distribution involves the main influencers of plating uniformity; the plating cell design and geometry, anode and cathode spacing, and the size and shape of the anode and cathode. The pattern image of the PCB will also influence plating uniformity. However, the less uniform a plating pattern (according to primary current distribution), the greater the variation in the plating thickness across such a pattern. It is commonly understood that PCB patterns that are very uniform in the layout of the circuit features exhibiting a uniform plating area across the panel will plate with minimal thickness variation. However, designs that exhibit ultra-uniform circuit layout patterns are not all that common. Certainly, this concept can be explained by looking at simple plating applications. In one such application, assume the plating is taking place on parallel plane electrodes as depicted in FiGurE 1. This is often referred to as the mathematical concept of equi-potential surfaces. Looking at the parallel planes in Figure 1, it is easy to see that current flowing between adjacent parallel electrodes Angled Cathode D A 3 2 1 0 H C is constant across the electrode surfaces. Thus, the length the current flow is equal. It is easy to see that the potential between two parallel surfaces is constant across the surface. For two parallel electrodes, the current at any point on either electrode is equal. Thus, plating thicknesses would be equal. FiGurE 2 illustrates what would happen if the electrodes where rotated or angled with respect to one another; the equi-potential surfaces would no longer be parallel to each other. The above figure is similar to the Hull Cell Testing concept, whereby the cathode is set at an angle from the anode to simulate varying current densities. When one of the electrodes is angled in such a fashion, the lines of current flow become more tightly spaced at the angled end. (see area AKB versus DHC in Figure 2). Due to the angle of BC, point B is closer to the AD electrode than is point C. Since the lines of current flow are always perpendicular to the to the equi-potential surface, the lines of flow become more tightly spaced at the angled end, resulting in a current density (i.e. plating thickness) variation across the BC surface. While this explanation is somewhat a simplification, one can see that potential theory does apply to plating cell design and anode/cathode configuration. Engineers must consider anode to cathode relationships with respect to size and spacing. In the next installment of “Positive Plating” the subject of anode to cathode spacing and secondary current distribution will be discussed in detail. In the meantime, stay positive. pCd&f MichaEl carano is vice president for oM Group, Inc. and can be reached at mike.carano@omgi.com. SEPTEMBER 2008 FiGurE 1. Plating taking place on parallel plane electrodes. A K B FiGurE 2. Angled cathode. ure 1 18 printEd CirCuit dESign & fAB

Table of Contents Feed for the Digital Edition of Printed Circuit Design & Fab - September 2008

Printed Circuit Design & Fab - August 2008 Contents Our Line Market Watch Around the World Happenings ROI Positive Plating Off the Shelf Marketplace Ad Index EMC for the Real World Final Finish Forum Design for Green: Laminates A Systematic Approach to Increasing Layer Count The NTI $100 Million Club Printable Nanocomposites BGA Bulletin

Printed Circuit Design & Fab - September 2008

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