Printed Circuit Design & Fab - November 2008 - (Page 38)

LEAD-FREE rEliaBility load condition of the board. A sinusoidal wave was used to define the actuator cycle with the board being in either maximum deflection or no-load condition at the peak of 2 mm and valley of the cycle respectively. The board was placed such that the packages were face down and away from the actuator. Six strain gages were mounted on one board, four on the component populated and two on the unpopulated side, in order to obtain strain data at different locations. The event detector was connected to the daisy chain circuits. Failures were recorded when the total resistance through the daisy chain network exceeded the threshold resistance of 300 ohms for 200 nanoseconds. Failure during testing was defined as the first event of intermittent discontinuity followed by an additional three such events in five subsequent cycles. etched for 60 sec. with solution containing 92% v/v CH3OH, 5% v/v HCl and bend testing. It can be seen that the 3% v/v HNO3 etchant. Some of the characteristic life for boards with ENIG packages were also tested using red dye finish is as much as two orders of magnipenetration method. The packages were tude greater than the other two types of soaked with the dye and then baked finishes. The ImAg finish was observed at 100o C for 45 minutes. The packto have the lowest characteristic life ages were then peeled under an optical amongst three types of finishes. The microscope. For cyclic bend, loading is drop test indicated several early failures due to relative displacement between that could not be analyzed to identify the packages and boards. For drop, high Gs nature of failures. Several failure mechacause large displacements and overstress nisms may have been operative. In testtrace, hence, more susceptibility of PCB ing, there was no clear winner in terms failures. In the case of the bend test, the of characteristic life amongst the three dominant failure mechanism was solder types of finishes. fatigue with cracks occurring in the solder joints near both the components and PCB side of the solder. Cracks were initiEffect of Surface Finish on ated at the corners and then propagated Intermetallic Formations through the bulk of solder parallel to the The use of different surface finishes on PCB plane. In the case of the drop test, copper pads affects the formation of the flow stress of solder increased three intermetallics between copper (from to four times faster as compared to the bond pad) and tin (from SAC solslow plastic deformation in cyclic bend. der) during the reflow process. Cu-Sn Drop Test Conditions Due to strain hardening, the tensile stress intermetallics are observed in OSP and The drop test was conducted according concentrated into the corner regions of ImAg, and Ni-Sn intermetallics are to JESD22-B1111. The drop height was the solder joints increased above the observed in ENIG finished boards. adjusted from 90 to 110 cm to achieve fracture strengths of the weakest reacIntermetallic formations at the PCB the required acceleration of 1500 G for tion layers. As a result, the cracks initiinterface, due to ENIG, OSP and ImAg, 0.5 sec. The response was measured with are shown in FiGurES plots and c the accelerometer, and the attenuation of FIGURE 2. Weibull 3a, B obtained ated and propagatedstudy the bend testing[2]. in experimental inside in interface instead of inside the bulk solder– as typithe test board oscillations was measured respectively. Intermetallics, being britcally observed in constant stressed joints. as a function of time and captured using tle formations, are generally the points In addition, the solder interconnections a digital oscilloscope. The boards were of failure in reliability testing. did not deform extensively enough under mounted such that the populated surface very fast mechanical loading, there was of the board was facing downwards Failure Analysis not enough driving force for the recrysduring the test. The event detector was Failure detection was done by electritallization which could generate a conconnected to the daisy chain circuits and cal testing. Electrical resistance of the tinuous network of grain boundaries for failures were recorded. Failure criterion daisy chain for each package before cracks to propagate3. for the drop test was the same as for and after the test was compared to find the bend test. When the first event of the location of failures. Failure analysis Failures occurring in the cyclic bend discontinuity was detected, the soldered consisted of visual inspection, destructive test for ENIG finished assemblies are cables were always checked to ensure and non-destructive techniques. Composhown in FiGurE 4a. In FiGurE 4B, that increase inWeibull plotsnot the FIGURE 2. resistance was obtained nents were singulated using in diamond the picture illustrates the cracking of in experimental study a bend testing[2]. result of any disconnected wire. saw and were then analyzed using optiboards that is a common observation cal and SEM methods. Samples were of micro cracks in drop testing. The FiGurE 2 shows the Weibull plots for Experimental Results FIGURE 3a. PCB solder joint interface with ENIG. FiGurE 3a. PCB solder joint interface with eNIG. 3a. PCB solder joint FIGURE 38 FiGurE 3B. PCB solder joint interface with with interfaceOSP. ENIG. FIGURE 3b. PCB solder joint interface with OSP. FiGurE 3c. PCB solder joint interface with ImAg. 3c. PCB solder joint FIGURE interface w printEd CirCuit dESign & fAB NOVEMBER 2008

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Printed Circuit Design & Fab - November 2008 Contents Our Line Market Watch Around the World Happenings ROI Positive Plating Ten Tips to Improve Manufacturability 3D Chip-Package-Board Modeling Improving Circuit Simulation With The Addition Of Real Measurements Ad Index PCB West: Interview with NBS Design Inc. The Influence of Final Finish on Lead-Free Assembly Reliability The Lead-free Soldering Challenges for Peelable Resists Off the Shelf Marketplace BGA Bulletin

Printed Circuit Design & Fab - November 2008

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