Printed Circuit Design & Fab - December 2008 - (Page 42)

HS laMinatES FiGurE 5. Microscopic cross sections of two stripline traces. FiGurE 3. Top left (near end eye); top right (40” l6); bottom left (40” l3); bottom right (40” l8). FiGurES 6. a) (left) weaves with different pitch; B) (right) jogged routing. FiGurE 4. Different styles of glass laminate weaves. Photos courtesy of the isola group. Fiber Weave Effect The secondary impact that a dielectric material can have on a high-speed channel design is skew. A typical PCB dielectric (core/prepreg) substrate is constructed by combining woven fiberglass fabrics with epoxy resin. The woven fiberglass is needed to provide strength and structural integrity to a dielectric material. FiGurE 4 shows typical laminate weaves. The numbers next to each diagram identify the glass fabric style based on the fiberglass thickness, pitch, yarn and the number of glass fiber strands used. The glass and the epoxy each have different relative permittivity (Er/Dk) values, thereby presenting a nonhomogenous medium for signal propagation. PCB designers usually route traces in multiples of 90° angles. A routed trace can land directly on top of the warp yarn (length), on top of the fill yarn (width), centered between the strands of warp yarn or centered between the strands of the fill yarn. FiGurE 5 is a microscopic cross section view of strip line traces landing on and off the weave. Assuming that the two traces in FIGURE 5 comprise the two legs of the differential pair (P and N), they experience two different Er values. This in turn results in different propagation velocities and loss profiles. At high data rates, the difference in propagation velocities leads to skew between the two legs of the differential pair. Depending on the data rate, it can amount to a substantial fraction of the unit interval (UI). The skew between the P and N legs results in common mode noise and also leads to a degradation of the differential signal. Substantial work has been done in the industry to study this effect2-5. To mitigate the skew associated with fiber 42 weave, some of the techniques that are currently being used in the industry include the use of wider trace geometries to achieve impedance targets. The downside is that an increase in PCB area is needed to route all traces with wider geometries compared to narrow trace geometries. For strip line traces (FiGurE 6a), the PCB designers can use two different weaves with different pitches for top and bottom substrates to average out the effect. FiGurE 6B shows an example of offset traces. The intra-pair spacing forces each trace onto the path of its neighbor, regardless of glass pitch. Making use of a core or a pre-preg material with a denser weave, like 2116, 2113, 7268 or 1652, compared to a sparse weave, like 106 or 1080, during the PCB design process can reduce the fiber weave effect. For a marginal cost increase, PCB designers can use a substrate like Nelco 4000-13EP SI, where the difference in Er between glass and epoxy is smaller compared to a regular FR-4 based substrate. Conclusion PCB design takes on new dimensions involving high-speed applications with serial busses at multi-gigabit data rates. Designers must carefully evaluate the various dielectric materials and choose a material that is appropriate for the application since it directly impacts the signal loss and the skew seen on a PCB. pCd&f rEFErEncES 1. aN529: Via Optimization Techniques for High Speed Channel Design. (www. altera.com) 2. Scott McMorrow and Chris Head, “The Impact of PCB laminate Weave on the electrical Performance of Differential Signaling at Multi-Gigabit Data rates. DesignCon 2005. ” 3. Jeff loyer, richard Kunze and Xiaoning ye, “Fiber Weave effect: Practical Impact analysis and Mitigation Strategies. DesignCon 2007. ” 4. Gustavo Blando, Jason r. Miller and Istvan Novak, “losses Induced by asymmetry in Differential Transmission lines. DesignCon 2007. ” 5. aN528: PCB Dielectric Material Selection and Fiber Weave effect on High Speed Channel routing. (www.altera.com) ravindra Gali is a senior design engineer with altera Corporation and can be reached at rgali@altera.com. DECEMBER 2008 printEd CirCuit dESign & fAB http://www.altera.com http://www.altera.com

Table of Contents Feed for the Digital Edition of Printed Circuit Design & Fab - December 2008

Printed Circuit Design & Fab - December 2008 Contents Our Line Market Watch Around the World Happenings ROI Global Sourcing EMC for the Real World Interconnect Strategies On the Forefront Final Finish Forum Test and Inspection Electronic System Design Data Management 101 Designers Take on Technology Challenges in 2008 PCB Signal Integrity, Power Integrity and EMC Challenges What’s in a Name? Ad Index PCB Dielectric Materials for High-Speed Applications Off the Shelf Marketplace BGA Bulletin

Printed Circuit Design & Fab - December 2008

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