Printed Circuit Design & Fab - January 2009 - (Page 28) SOLDER MaSk dFa DeSign anD faB tiPS for improving Solder Mask Registration Early design decisions can improve solder mask registration on fine-pitch products, resulting in significantly higher assembly yields. by HIEN Ly The evolution of surface mount technology (SMT) is toward the use of smaller and higher I/O components for new electronics applications, including portable and hand-held products. This drives a need to reduce size and increase interconnect density for new area array packages. The assembly process for ball-grid array (BGA) and chip-scale packages (CSP) has stabilized over the years.1 However, products using fine-pitch BGA/ CSP components at 0.8-mm pitch or below still pose many assembly challenges, including solder short prevention and detection. When implementing fine-pitch BGA/CSP components into production, experience has shown that some assembly process issues can be caused by solder mask misregistration that occurs during printed circuit board (PCB) fabrication. Misregistration of solder mask can commonly approach +/- 0.003 inches from the datum point; however, this typically does not create problems in standard SMT processes. As the industry continues to use more array components with ball pitches of 0.8 mm and less, the opportunity for defects associated with solder shorts that are related to solder mask design and registration becomes more prevalent. Solder 28 mask misregistration can cause issues with exposed adjacent traces and/ or vias underneath array packages, thus increasing the opportunity for shorts. FiGurE 1 shows an example of an exposed trace due to solder mask misregistration. Note that the exposed copper traces are not visible from the top view (FiGurE 1a), but are visible when viewed from an angle (FiGurE 1B). Consequently, the solder mask coating process quality is a critical concern for high-density boards containing fine-pitch BGA/CSP devices and has an impact on the assembly process. The acceptable solder mask registration criteria must be more stringent than standard PCB solder mask fabrication requirements. Therefore, proactive design and fabrication considerations should be followed to improve assembly yields. When a trace is exposed due to solder mask misregistration, solder bridging may form during the solder paste screen-printing process. Misalignment of the solder paste printing process could aggravate the bridging issue. Placement of the fine-pitch component would further spread the solder paste into the solder mask cavity. During reflow, the copper is not Figure 1A. Top view Ð exposed hot-slump visible. phenomenon spreads the molten solFigure 1. PCB defect - exposed copper traces. der and causes solder bridging. When the solder joint solidifies after reflow, a minute solder bridge would be formed between the pad and the exposed trace or via. Typically, this minute solder bridging of pad to the exposed adjacent conductor or via is very small (about 1 mil to 2 mils thick) and is referred to as a “whisker” short. FiGurE 2 shows a cross-section view of 1a 1B Figure 1A. Top view Ð exposed copper is not visible. Figure 1. PCB defect - exposed copper traces. Figure 1B. Angle view Ð - exposedcopper traces FiGurE 1. PCB defect exposed copper are visible. traces. JANUARY 2009 PRINTED CIRCUIT DESIGN & FAB
Table of Contents Feed for the Digital Edition of Printed Circuit Design & Fab - January 2009 Printed Circuit Design & Fab - January 2009 Contents Our Line Market Watch Around the World Happenings ROI The Signal Doctor Positive Plating Final Finish Forum Making Sense of Laminate Dielectric Properties Design and Fab Tips for Improving Solder Mask Registration Automating the DDRx Interface Verification Process Printed Circuit Design & Fab Annual Buyers Guide: Special Suppliers Section Printed Circuit Design & Fab Annual Buyers Guide: Guide to Products and Services Off the Shelf Marketplace Ad Index BGA Bulletin Printed Circuit Design & Fab - January 2009 Printed Circuit Design & Fab - January 2009 - (Page Intro) Printed Circuit Design & Fab - January 2009 - Printed Circuit Design & Fab - January 2009 (Page Cover1) Printed Circuit Design & Fab - January 2009 - Printed Circuit Design & Fab - January 2009 (Page Cover2) Printed Circuit Design & Fab - January 2009 - Printed Circuit Design & Fab - January 2009 (Page 1) Printed Circuit Design & Fab - January 2009 - Contents (Page 2) Printed Circuit Design & Fab - January 2009 - Contents (Page 3) Printed Circuit Design & Fab - January 2009 - Our Line (Page 4) Printed Circuit Design & Fab - January 2009 - Our Line (Page 5) Printed Circuit Design & Fab - January 2009 - Market Watch (Page 6) Printed Circuit Design & Fab - January 2009 - Market Watch (Page 7) Printed Circuit Design & Fab - January 2009 - Around the World (Page 8) Printed Circuit Design & Fab - January 2009 - Around the World (Page 9) Printed Circuit Design & Fab - January 2009 - Around the World (Page 10) Printed Circuit Design & Fab - January 2009 - Around the World (Page 11) Printed Circuit Design & Fab - January 2009 - Happenings (Page 12) Printed Circuit Design & Fab - January 2009 - Happenings (Page 13) Printed Circuit Design & Fab - January 2009 - ROI (Page 14) Printed Circuit Design & Fab - January 2009 - The Signal Doctor (Page 15) Printed Circuit Design & Fab - January 2009 - The Signal Doctor (Page 16) Printed Circuit Design & Fab - January 2009 - The Signal Doctor (Page 17) Printed Circuit Design & Fab - January 2009 - Positive Plating (Page 18) Printed Circuit Design & Fab - January 2009 - Final Finish Forum (Page 19) Printed Circuit Design & Fab - January 2009 - Making Sense of Laminate Dielectric Properties (Page 20) Printed Circuit Design & Fab - January 2009 - Making Sense of Laminate Dielectric Properties (Page 21) Printed Circuit Design & Fab - January 2009 - Making Sense of Laminate Dielectric Properties (Page 22) Printed Circuit Design & Fab - January 2009 - Making Sense of Laminate Dielectric Properties (Page 23) Printed Circuit Design & Fab - January 2009 - Making Sense of Laminate Dielectric Properties (Page 24) Printed Circuit Design & Fab - January 2009 - Making Sense of Laminate Dielectric Properties (Page 25) Printed Circuit Design & Fab - January 2009 - Making Sense of Laminate Dielectric Properties (Page 26) Printed Circuit Design & Fab - January 2009 - Making Sense of Laminate Dielectric Properties (Page 27) Printed Circuit Design & Fab - January 2009 - Design and Fab Tips for Improving Solder Mask Registration (Page 28) Printed Circuit Design & Fab - January 2009 - Design and Fab Tips for Improving Solder Mask Registration (Page 29) Printed Circuit Design & Fab - January 2009 - Design and Fab Tips for Improving Solder Mask Registration (Page 30) Printed Circuit Design & Fab - January 2009 - Automating the DDRx Interface Verification Process (Page 31) Printed Circuit Design & Fab - January 2009 - Automating the DDRx Interface Verification Process (Page 32) Printed Circuit Design & Fab - January 2009 - Automating the DDRx Interface Verification Process (Page 33) Printed Circuit Design & Fab - January 2009 - Printed Circuit Design & Fab Annual Buyers Guide: Special Suppliers Section (Page 34) Printed Circuit Design & Fab - January 2009 - Printed Circuit Design & Fab Annual Buyers Guide: Special Suppliers Section (Page 35) Printed Circuit Design & Fab - January 2009 - Printed Circuit Design & Fab Annual Buyers Guide: Guide to Products and Services (Page 36) Printed Circuit Design & Fab - January 2009 - Printed Circuit Design & Fab Annual Buyers Guide: Guide to Products and Services (Page 37) Printed Circuit Design & Fab - January 2009 - Printed Circuit Design & Fab Annual Buyers Guide: Guide to Products and Services (Page 38) Printed Circuit Design & Fab - January 2009 - Printed Circuit Design & Fab Annual Buyers Guide: Guide to Products and Services (Page 39) Printed Circuit Design & Fab - January 2009 - Printed Circuit Design & Fab Annual Buyers Guide: Guide to Products and Services (Page 40) Printed Circuit Design & Fab - January 2009 - Printed Circuit Design & Fab Annual Buyers Guide: Guide to Products and Services (Page 41) Printed Circuit Design & Fab - January 2009 - Printed Circuit Design & Fab Annual Buyers Guide: Guide to Products and Services (Page 42) Printed Circuit Design & Fab - January 2009 - Off the Shelf (Page 43) Printed Circuit Design & Fab - January 2009 - Marketplace (Page 44) Printed Circuit Design & Fab - January 2009 - Marketplace (Page 45) Printed Circuit Design & Fab - January 2009 - Ad Index (Page 46) Printed Circuit Design & Fab - January 2009 - Ad Index (Page 47) Printed Circuit Design & Fab - January 2009 - BGA Bulletin (Page 48) Printed Circuit Design & Fab - January 2009 - BGA Bulletin (Page Cover3) Printed Circuit Design & Fab - January 2009 - BGA Bulletin (Page Cover4)
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