Printed Circuit Design & Fab - February 2009 - (Page 15) Route to Control Vias Planning via placement can improve the routability and integrity of the PCB. TheRe ARe MANY SChOOLS of thought as to the best way to route a board, but one thing that most have in common is controlling the SuSy number and the WEBB location of vias. Designing entirely without vias would be optimum but is usually not possible. However, careful placement of vias can benefit routing channels, be used to set up rows and columns, improve the signal integrity and return path and use fewer routing layers. It can be very productive to use a "fan out grid" when planning routing. Fan out grids may have different priorities, but in basic form, they are the placement of escape vias from pads such that signals and their return currents can pass between via sites on any layer of the board. This is good for signal integrity because it keeps the signal and its return current closely coupled to one another. FiGurES 1 is an example of IC fan out grids from PCB Libraries. When a single routing area requires many vias, a strategy should be found that will take up the fewest routing channels. The simplest way is to line up the vias in a row, taking care to keep return paths open between the antipads of those vias, as shown in FiGurE 2. Another possibility is to stagger the vias in a slightly east-west (or north-south) arrangement so that there is room for additional traces and return current, as shown in FiGurE 3. This takes up only slightly more room than a single line of vias and provides a better chance of keeping the antipads from overlapping, thus interfering with return current. When looking at an area for routing, it is usually easy to see if there are more traces that need to be routed in an east-west direction or a north-south direction. In this case, care in planning of via placement will help to leave the most trace routing channels available in the direction they are needed. For instance, if there are many traces needed in a north-south direction and only a few in an east-west direction, one can set up columns of vias that maximize the change of layers in the north-south direction, as illustrated in FiGurE 4. It is usually a good idea to route a bus or a group of signals on a single layer whenever possible. This allows for the best use of an area of the board and limits the return current of the signals to a single layer as well, which is good for signal integrity. When there are no vias, there is no interruption in routing channels that might be needed on other layers. It may take a little thought to do, but the benefit is felt in routing layer after layer throughout the stackup. Designers hear about the pros and cons of autorouting boards, but it definitely takes a back seat to hand routing in the area of via placement. Even with carefully worked out constraints, an autorouter just cannot match what a designer can do with via design. These are just a few of the ways to use via placement. If we are careful and plan for the placement of vias in the boards we design, we will definitely help the routability and integrity and the number of routing layers of the boards we design, so it is well worth the effort. pCd&f FiGurE 2. Open return paths between the antipads. SuSy wEBB is a senior PCB designer at Fairfield Industries in houston, TX, and is a regular speaker at the PCB Shows, swebb@fairfield.com. FiGurE 1. IC fanout grids from PCB Libraries. FEBRUARY 2009 FiGurE 3. Staggered vias leaving room for additional traces and return current. FiGurE 4. Columns of vias maximizing change of layers in north-south direction. printEd CirCuit dESign & fAB 15
Table of Contents Feed for the Digital Edition of Printed Circuit Design & Fab - February 2009 Printed Circuit Design & Fab - February 2009 Contents Our Line Market Watch Around the World Happenings ROI Tip Jar BGA Bulletin Interconnect Strategies Final Finsh Forum Defects Database Embedded Active Components In Multilayer LCP Packages Simulation: The Need for Speed Advanced Registration Systems The DC Design Squeeze Ad Index Do You Really Want a Better Autorouter? Designing With Conductive Materials, Part 1 Off th eShelf Marketplace On the Forefront Printed Circuit Design & Fab - February 2009 Printed Circuit Design & Fab - February 2009 - (Page Intro) Printed Circuit Design & Fab - February 2009 - Printed Circuit Design & Fab - February 2009 (Page Cover1) Printed Circuit Design & Fab - February 2009 - Printed Circuit Design & Fab - February 2009 (Page Cover2) Printed Circuit Design & Fab - February 2009 - Printed Circuit Design & Fab - February 2009 (Page 1) Printed Circuit Design & Fab - February 2009 - Contents (Page 2) Printed Circuit Design & Fab - February 2009 - Contents (Page 3) Printed Circuit Design & Fab - February 2009 - Our Line (Page 4) Printed Circuit Design & Fab - February 2009 - Our Line (Page 5) Printed Circuit Design & Fab - February 2009 - Market Watch (Page 6) Printed Circuit Design & Fab - February 2009 - Market Watch (Page 7) Printed Circuit Design & Fab - February 2009 - Around the World (Page 8) Printed Circuit Design & Fab - February 2009 - Around the World (Page 9) Printed Circuit Design & Fab - February 2009 - Around the World (Page 10) Printed Circuit Design & Fab - February 2009 - Around the World (Page 11) Printed Circuit Design & Fab - February 2009 - Happenings (Page 12) Printed Circuit Design & Fab - February 2009 - Happenings (Page 13) Printed Circuit Design & Fab - February 2009 - ROI (Page 14) Printed Circuit Design & Fab - February 2009 - Tip Jar (Page 15) Printed Circuit Design & Fab - February 2009 - BGA Bulletin (Page 16) Printed Circuit Design & Fab - February 2009 - BGA Bulletin (Page P1) Printed Circuit Design & Fab - February 2009 - BGA Bulletin (Page P2) Printed Circuit Design & Fab - February 2009 - BGA Bulletin (Page P3) Printed Circuit Design & Fab - February 2009 - BGA Bulletin (Page P4) Printed Circuit Design & Fab - February 2009 - BGA Bulletin (Page 17) Printed Circuit Design & Fab - February 2009 - Interconnect Strategies (Page 18) Printed Circuit Design & Fab - February 2009 - Interconnect Strategies (Page 19) Printed Circuit Design & Fab - February 2009 - Final Finsh Forum (Page 20) Printed Circuit Design & Fab - February 2009 - Defects Database (Page 21) Printed Circuit Design & Fab - February 2009 - Embedded Active Components In Multilayer LCP Packages (Page 22) Printed Circuit Design & Fab - February 2009 - Embedded Active Components In Multilayer LCP Packages (Page 23) Printed Circuit Design & Fab - February 2009 - Embedded Active Components In Multilayer LCP Packages (Page 24) Printed Circuit Design & Fab - February 2009 - Embedded Active Components In Multilayer LCP Packages (Page 25) Printed Circuit Design & Fab - February 2009 - Simulation: The Need for Speed (Page 26) Printed Circuit Design & Fab - February 2009 - Simulation: The Need for Speed (Page 27) Printed Circuit Design & Fab - February 2009 - Simulation: The Need for Speed (Page 28) Printed Circuit Design & Fab - February 2009 - Simulation: The Need for Speed (Page 29) Printed Circuit Design & Fab - February 2009 - Advanced Registration Systems (Page 30) Printed Circuit Design & Fab - February 2009 - Advanced Registration Systems (Page 31) Printed Circuit Design & Fab - February 2009 - Advanced Registration Systems (Page 32) Printed Circuit Design & Fab - February 2009 - Advanced Registration Systems (Page 33) Printed Circuit Design & Fab - February 2009 - The DC Design Squeeze (Page 34) Printed Circuit Design & Fab - February 2009 - The DC Design Squeeze (Page 35) Printed Circuit Design & Fab - February 2009 - The DC Design Squeeze (Page 36) Printed Circuit Design & Fab - February 2009 - Ad Index (Page 37) Printed Circuit Design & Fab - February 2009 - Do You Really Want a Better Autorouter? (Page 38) Printed Circuit Design & Fab - February 2009 - Do You Really Want a Better Autorouter? (Page 39) Printed Circuit Design & Fab - February 2009 - Designing With Conductive Materials, Part 1 (Page 40) Printed Circuit Design & Fab - February 2009 - Designing With Conductive Materials, Part 1 (Page 41) Printed Circuit Design & Fab - February 2009 - Designing With Conductive Materials, Part 1 (Page 42) Printed Circuit Design & Fab - February 2009 - Off th eShelf (Page 43) Printed Circuit Design & Fab - February 2009 - Marketplace (Page 44) Printed Circuit Design & Fab - February 2009 - Marketplace (Page 45) Printed Circuit Design & Fab - February 2009 - Marketplace (Page 46) Printed Circuit Design & Fab - February 2009 - Marketplace (Page 47) Printed Circuit Design & Fab - February 2009 - On the Forefront (Page 48) Printed Circuit Design & Fab - February 2009 - On the Forefront (Page Cover3) Printed Circuit Design & Fab - February 2009 - On the Forefront (Page Cover4)
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