Printed Circuit Design & Fab - February 2009 - (Page 18)

PCB Stackup Analysis and Design, Part 3 PCB material selection requires the evaluation of electrical, mechanical and thermal properties, as well as price. POURING COPPeR on outer layers and grounding it with multiple vias can enhance shielding, reduce crosstalk and improve heat dissipation.26 Furthermore, copper/ground flooding (not to be confused with thieving, which involves applying dummy copper pads) influences impedance and can convert mictrostrip dr. ABE lines into coplanar configuration. Such (ABBAS) riAzi geometries can be efficiently analyzed with Polar Instruments’ Si8000 software27 that employs Boundary Element Modeling to forecast the finished impedance of various PCB structures. FiGurE 8 exemplifies impedance computation for a coplanar differential pair. The parameters comprise trace width = 12 mil, trace thickness = 2 mil, dielectric thickness = 8 mil, dielectric constant = 3.38, intrapair separation = 15 mil, line to ground clearance (horizontal) = 10 mil, solder mask thickness = 0.8 mil and solder mask dielectric constant = 4.5. Si8000 predicts differential impedance of 100.43 Ω. This denotes a nominal calculation, but frequently it is necessary to consider impedance tolerances. A typical tolerance value is +/- 10%. A differential impedance of 100 +/- 10% implies variation from 90 Ω to 110 Ω. Sometimes, it is desirable to have a tighter tolerance such as +/- 5%, since impedance tolerance often involves trade-off between impedance of PCB traces, package, driver output impedance and termination resistors. Tightening the PCB trace tolerance makes it feasible to relax the constraints on other parameters (package, driver, termination), but this also increases board fabrication cost. A 5% tolerance is more expensive to manufacture than a 10% tolerance, which is costlier than a 15% tolerance.25 Three main materials3 in a multilayer PCB embrace copper foil sheets, resin and woven glass cloth. Cores or laminate sheets are constructed by affixing copper foil to one or both sides of fully cured prepreg sheets. Prepreg mats are a weave of glass fiber yarns preimpreganted28 with partially cured resin. Several resin types are utilized for prepreg preparation. These resin systems usually differ in electrical properties (such as dielectric constant and loss tangent) and mechanical/thermal characteristics (coefficient of expansion, glass transition temperature and rate of moisture absorption). The commonly used FR-4 has a woven glass/epoxy resin composition. However, there are alternatives such as GETEK, MEGTRON, BT, polyamide28 and cyanate resin material, with attractive mechanical or electrical properties (low dielectric constant and loss tangent). 18 Fibers are applied to strengthen the resins; these comprise the electrical grade E glass and structural grade S glass. E glass is more common, but S glass is stronger and has lower Er (also more expensive) than E glass. Addition of fiber to resin alters the electrical and mechanical characteristics of the composite structure based on glass-to-resin ratio. FR-6 utilizes a polyester29 resin system plus glass matte reinforcement and is suitable for flame resistant 30, low capacitance or high impact applications. Solder mask / resist is a coating that protects PCB traces and prevents solder bridges and shorts. It facilitates wave soldering applied in mass assembly. Solder mask is a lacquer-like polymer layer often applied with a green tint, but it is available in various colors and finishes. A common solder mask 31 is Liquid Photo Imagable (LPI). For a multilayer PCB, the copper thickness does not have to be the same for all stackup layers. It is also unnecessary for all the cores to be of the same laminate. Hybridtype construction has been gaining popularity. The PCB conductor and dielectric losses 32 constitute another critical consideration. The DC conductor resistance is governed by Equation 5 All of the Equations can be found in FiGurE 9. Here, Rdc represents resistance per unit length for DC currents, ρ is the bulk conductor resistivity33, W is trace width and t is thickness. The conductor DC losses are directly related to Rdc and are frequency independent. DC losses are negligible for short traces of large crosssections and become important for long lines of small cross-sectional geometries and for multi-drop topologies. In Equation 6, Rac symbolizes the AC conductor resistance per unit length and ό is the skin depth. Rac can be reduced by widening the trace width. It varies inversely with ό and FiGurE 8. Impedance computation for a coplanar construct utilizing Si8000. FEBRUARY 2009 printEd CirCuit dESign & fAB

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Printed Circuit Design & Fab - February 2009 Contents Our Line Market Watch Around the World Happenings ROI Tip Jar BGA Bulletin Interconnect Strategies Final Finsh Forum Defects Database Embedded Active Components In Multilayer LCP Packages Simulation: The Need for Speed Advanced Registration Systems The DC Design Squeeze Ad Index Do You Really Want a Better Autorouter? Designing With Conductive Materials, Part 1 Off th eShelf Marketplace On the Forefront

Printed Circuit Design & Fab - February 2009

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