Printed Circuit Design & Fab - March 2009 - (Page 20) co-desIGn IC Package to PCB Co-Design Advances in IC packages provide designers with pin assignment control that reduces routing time, improves signal integrity and reduces layer count. by BENJAMIN JoRDAN Many interesting assembly methods and packaging techniques have been explored in the past to overcome the challenges of trying to make more features fit in less space. One can say the printed circuit board itself was a revolutionary technology that enabled low-cost mass production of electronic equipment, well before semiconductors were put into widespread use. However, aside from the complexities of their production, PCBs presented a new set of challenges for engineers and manufacturers to overcome. Design in the consumer space, for example, was a constant tradeoff between size, look, function, user interface (psychology), power, reliability and yield. New interconnect technology required new packaging for components, which in turn required new assembly machinery and practices. Vacuum tubes for small appliances went to pig-tails rather than sockets, but their pin configuration was still largely dictated by the physical design of the plate, grid(s) and cathode within the envelope. New machines had to be created for the preparation and preforming of component leads, then along came the transistor. So the drive continues toward making things smaller, faster, better. At each step of the way, the configuration of device pins has largely been dictated by the internal physical structure of the device in question. Even today, we still use many devices that have a pinout that, to the PCB designer, is far from sensible. When you consider the cost and complexity of the actual chip design and constraints of power consumption and timing, this is hardly surprising. Another evolutionary step in the electronics industry was the development of MSI, LSI and then VLSI (Medium/Large/ Very Large Scale Integration) COTS (Common-Of-The-Shelf) components. Most notorious among these are the 7400 standard logic series and their pin-compatible descendants, as well as various transistor arrays and de facto standard analog parts like the 741 op-amp or the LM7805 regulator. Throughout the 20 1980s and 1990s, I used many of these components in designs, and I always lamented over the seemingly ridiculous pinouts of many useful devices that made my life difficult as a budding design engineer. Without Co-Design A case in point: Most of the design projects I was involved with involved microcontrollers such as the MCS-48 and MCS-51 families. These devices have since spawned countless derivatives with different packages, but at the time, they were constrained to a 40-pin DIP. To fit all the address and data lines required for the memory interface, the manufacturers had to multiplex the device pins. I had to use a separate 8-bit latch device to hold the low address byte while the data were being transferred across the bus. There’s a handy pair of devices in the 74xx series, the fIGure 1. A schematic snippet of the address latch from a typical design. MARCH 2009 PRINTED CIRCUIT DESIGN & FAB
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