Printed Circuit Design & Fab - March 2009 - (Page 28) test and reLIaBILIty Dielectric Performance in Lead-Free Assembly New test methods offer powerful tools to help understand circuit board failures and the role of materials in PCB reliability. by PAUL REID It has been demonstrated that lead-free assembly and rework of printed circuit boards (PCBs) can reduce reliability by up to 50% in well-fabricated products. There are two main reliability influences in lead-free applications: copper quality and material robustness. The reliability impact of copper quality is readily evaluated using thermal cycling, while monitoring resistance in test circuits, followed by a microscopic evaluation of plating variables and failure analysis. The reliability impact of materials, however, is not so directly evaluated. Although materials impart the z-axis expansion that causes failure, the material itself is not normally monitored in reliability testing. Traditionally, the investigation of material damage in the reliability testing of bare PCBs has been limited to random microscopic evaluation. Materials traditionally considered robust are now failing in a lead-free application. In response to the need to quantify the material’s role in reliability, two unique material test methods have been developed: cyclic time to delamination at 260° C (cT260) and detection of material degradation in representative test coupons by Dielectric Estimation and Laminate Analysis Method (DELAM). This article offers an overview of these two evaluation methods, their applications and benefits. Those familiar with RoHS requirements and the response of the electronics industry to the removal of lead from products understand that increasing the assembly temperature from 230° C to 245° C or 260° C has had a significant influence in reducing PCB reliability. A well-fabricated PCB’s reliability is typically reduced 50%, while poorly fabricated PCBs may fail in assembly, resulting in an otherwise robust product now vulnerable 28 to failure. The failure modes may be classified into two general groups: interconnect failures and material failures. Interconnect failure includes increased incidences of corner or knee cracks, interconnect or post failures, pad rotation and other copper related discrepancies. Material may fail by delamination, cohesive failure, propagation of crazing and material degradation. In conjunction with damaging of the interconnects, lead-free assembly and rework damages the dielectric material. The dielectric materials addressed in this article are limited to epoxy fiberglass substrate, designated G-10 and FR-4 (flame retardant class 4). The dielectric material is frequently bonded to copper, and the copper and glass components of the base material are less affected by the thermal cycles associated with lead-free assembly and rework than the epoxy. The epoxy portion is vulnerable to the thermal cycles associated with lead-free assembly and may fail. Failure is the result of mechanical stress and chemical degradation induced by thermal excursions. Frequently, the effect of material degradation, like delamination, is to artificially extend the thermal cycles to failure in reliability testing by stress relieving the coupon. Delamination, or cohesive failures, may reduce cycles to failure, but this is infrequent. Although significant material failures may reduce damage accumulation in the test sample, these failures change the electrical characteristics of the PCB and can provide a path for conductive anodic filament growth (CAF). Changes in the electrical characteristics of the PCB may be found in electrical testing after assembly, while CAF-type failures may develop in the end use environment. Presented with the challenge of degrading materials, MARCH 2009 PRINTED CIRCUIT DESIGN & FAB
For optimal viewing of this digital publication, please enable JavaScript and then refresh the page. If you would like to try to load the digital publication without using Flash Player detection, please click here.