Printed Circuit Design & Fab - June 2008 - (Page 26) SIGNAL intEGrity modeling Common ground noise in High-speed multi-board PCB systems The amount of noise between reference planes in two adjoining boards depends on the inductance produced by the inter-board connector. by MOSIN MONDAL, BHyRAV MuTNuR, PRAVIN PATEL, SAMuEL CONNOR, BRuCE ARCHAMBEAuLT, and MOISES CASES The high-speed link paths in today’s computer systems frequently span across multiple circuit boards. These signal paths on multiple boards are connected through connectors and cables, which often introduce impedance discontinuities. The challenges presented by multi-board signaling have been addressed in most high-speed interfaces by using differential signaling, which is less severely impacted by connector discontinuities. However, one pitfall of differential signaling is the tendency to ignore the accompanying common mode signal and mode conversion effects. Signal integrity tools often consider only the differential-to-differential parameters (SDD11 and SDD21), ignore other mixed mode S-parameters, and assume that the reference planes in each circuit board are tied perfectly to a common ground. Therefore, this kind of methodology fails to capture the common mode effects on signals. The true scenario, however, is that at high frequencies the reference planes in multi-board systems are independent, and therefore significant noise voltages can develop between reference planes due to common mode currents flowing through the connectors. This noise voltage is a function of the common mode current and the loop inductance of the 26 connector as seen by the signal line. In this paper, the impact of the nonideal common ground on the electrical behavior of multi-board differential signaling is studied. In particular, the amount of common mode signal present in a realistic design, the amount of inductance created by a signal line due to inter-board connectors, the amount of noise between reference planes in two adjoining boards, and the overall impact on the high speed differential signals are described. Common Mode Signal Due to Non-Ideal Common Ground In a multi-board system, signals are transmitted throughout the boards using either microstrip or stripline transmission lines. FiGurE 1 shows an example of an interface where two boards with microstrip lines are connected through connector pins, bent at an angle that properly connects one plane to the other. Some of the pins in the connector are designated as the ground pins that connect to the ground planes. The actual configuration of the ground pins will impact inductance (as discussed in a later section) and is therefore important for the performance of the design. In this section, the existence of common mode noise due to non-ideal common ground connection for the example shown in Figure 1 is demonstrated. Measurement data proves the importance of considering non-ideal !FiGurE 2. eye diagram for signal mea- ! FiGurE 1. schematic of two perpendicular boards connected by a connector. sured at a Locust board with 800mV p-p at 2.125 Gbps input fed into a Cricket board. JUNE 2008 printEd circuit dESign & fAB
Table of Contents Feed for the Digital Edition of Printed Circuit Design & Fab - June 2008 Printed Circuit Design & Fab - June 2008 Contents Our Line Market Watch Around the World Happenings ROI Tip Jar Interconnect Strategies Final Finish Forum DFA/DFT Signal Integrity From the Field DFA Fab Basics Drill Off the Shelf Marketplace Ad Index BGA Bulletin Printed Circuit Design & Fab - June 2008 Printed Circuit Design & Fab - June 2008 - Printed Circuit Design & Fab - June 2008 (Page Cover1) Printed Circuit Design & Fab - June 2008 - Printed Circuit Design & Fab - June 2008 (Page Cover2) Printed Circuit Design & Fab - June 2008 - Printed Circuit Design & Fab - June 2008 (Page 1) Printed Circuit Design & Fab - June 2008 - Contents (Page 2) Printed Circuit Design & Fab - June 2008 - Contents (Page 3) Printed Circuit Design & Fab - June 2008 - Our Line (Page 4) Printed Circuit Design & Fab - June 2008 - Our Line (Page 5) Printed Circuit Design & Fab - June 2008 - Market Watch (Page 6) Printed Circuit Design & Fab - June 2008 - Market Watch (Page 7) Printed Circuit Design & Fab - June 2008 - Around the World (Page 8) Printed Circuit Design & Fab - June 2008 - Around the World (Page 9) Printed Circuit Design & Fab - June 2008 - Around the World (Page 10) Printed Circuit Design & Fab - June 2008 - Around the World (Page 11) Printed Circuit Design & Fab - June 2008 - Happenings (Page 12) Printed Circuit Design & Fab - June 2008 - Happenings (Page 13) Printed Circuit Design & Fab - June 2008 - ROI (Page 14) Printed Circuit Design & Fab - June 2008 - ROI (Page 15) Printed Circuit Design & Fab - June 2008 - Tip Jar (Page 16) Printed Circuit Design & Fab - June 2008 - Tip Jar (Page 17) Printed Circuit Design & Fab - June 2008 - Interconnect Strategies (Page 18) Printed Circuit Design & Fab - June 2008 - Interconnect Strategies (Page 19) Printed Circuit Design & Fab - June 2008 - Final Finish Forum (Page 20) Printed Circuit Design & Fab - June 2008 - Final Finish Forum (Page 21) Printed Circuit Design & Fab - June 2008 - DFA/DFT (Page 22) Printed Circuit Design & Fab - June 2008 - DFA/DFT (Page 23) Printed Circuit Design & Fab - June 2008 - DFA/DFT (Page 24) Printed Circuit Design & Fab - June 2008 - DFA/DFT (Page 25) Printed Circuit Design & Fab - June 2008 - Signal Integrity (Page 26) Printed Circuit Design & Fab - June 2008 - Signal Integrity (Page 27) Printed Circuit Design & Fab - June 2008 - Signal Integrity (Page 28) Printed Circuit Design & Fab - June 2008 - Signal Integrity (Page 29) Printed Circuit Design & Fab - June 2008 - From the Field (Page 30) Printed Circuit Design & Fab - June 2008 - From the Field (Page 31) Printed Circuit Design & Fab - June 2008 - From the Field (Page 32) Printed Circuit Design & Fab - June 2008 - From the Field (Page 33) Printed Circuit Design & Fab - June 2008 - DFA (Page 34) Printed Circuit Design & Fab - June 2008 - DFA (Page 35) Printed Circuit Design & Fab - June 2008 - DFA (Page 36) Printed Circuit Design & Fab - June 2008 - DFA (Page 37) Printed Circuit Design & Fab - June 2008 - Fab Basics (Page 38) Printed Circuit Design & Fab - June 2008 - Fab Basics (Page 39) Printed Circuit Design & Fab - June 2008 - Drill (Page 40) Printed Circuit Design & Fab - June 2008 - Drill (Page 41) Printed Circuit Design & Fab - June 2008 - Drill (Page 42) Printed Circuit Design & Fab - June 2008 - Off the Shelf (Page 43) Printed Circuit Design & Fab - June 2008 - Marketplace (Page 44) Printed Circuit Design & Fab - June 2008 - Marketplace (Page 45) Printed Circuit Design & Fab - June 2008 - Marketplace (Page 46) Printed Circuit Design & Fab - June 2008 - Ad Index (Page 47) Printed Circuit Design & Fab - June 2008 - BGA Bulletin (Page 48) Printed Circuit Design & Fab - June 2008 - BGA Bulletin (Page Cover3) Printed Circuit Design & Fab - June 2008 - BGA Bulletin (Page Cover4)
For optimal viewing of this digital publication, please enable JavaScript and then refresh the page. If you would like to try to load the digital publication without using Flash Player detection, please click here.