Printed Circuit Design & Fab - August 2008 - (Page 38) outSourcinG fiGurE 6. Defect Pareto – top three defects. fiGurE 5. ALIvh PWB – thermal shock. fiGurE 4. hDI PWB – thermal shock. lots were rejected post reflow (after surface-mount assembly) and during boardlevel electrical test. Cosmetic Rejects. Incoming inspection was performed using IPC 600 Rev G. There were many product rejections due to incorrect paperwork, scratches, exposed copper and more. A meeting was held with suppliers and CMs to address the problems; after which, suppliers put a plan in place to address scratches and exposed copper, reducing the errors going to the CM. The Kyocera Wireless Corp. (KWC) team audited the suppliers for corrective action. There were several other process flow and material handling issues that had to be resolved to minimize PCB problems at surface-mount production. Prior to assembly outsourcing, PCBs were shipped from supplier locations to KWC in San Diego, CA, and immediately utilized for production, so staging and storage was minimal. This situation changed when surface-mount factory operations moved to contract manufacturing in China. Due to customs requirements, all parts shipped to China must go through customs in Hong Kong and then are staged in a warehouse facility until they are ready to move to the CM’s warehouse, resulting in increased staging time and handling for PCBs. Suppliers were required to improve the packaging from standard plastic bags to specialized seamless bags that were vacuum sealed with a desiccant inside. This required some changes in PCB packaging, but in the long run resulted in higher reliability. The warehouse audits were conducted to ensure that temperature was maintained at 22ºC +/- 5ºC with humidity less than 60%. Particular attention was given to storage during the summer months when heat and humidity were very high in this geographic area. 38 Functional Rejects. The majority of the defects after reflow were classified into three major categories: opens, delamination and shorts. This required a review of handling and test operations at CMs and process controls at suppliers. The corrective action began with compiling defect data and meetings with the supplier and the CM. This was followed up with storage and handling audits to ensure that corrective actions were being executed properly. Fabricators implemented corrective actions in the PCB packaging area by changing the bake cycle to 120°C for four hours prior to dry packaging. The CM implemented corrective actions at IQC by resealing all packages opened for inspection before returning to storage. On the production floor, packages were only opened just prior to loading on the assembly line, and all opened packages were stored in dry boxes. Reflow assembly time was controlled within 48 hours. Warehouse corrective actions were implemented to store PCBs in a controlled temperature/ humidity portion of the warehouse, and FIFO (first in, first out) was enforced. To address delamination issues, PCB suppliers conducted a design of experiments (DOE) with their material suppliers to get a better understanding in processing high Tg laminates. Circuit trace "opens" issues were addressed by implementing controls in the electroless plating process and various other plating and cleaning bath parameters and controls. Additionally, controls were implemented in the hot-air rework process at the CM since some of the "opens" issues were occurring after rework. Proper training of rework operators, controlled distance of hot air nozzles and airflow, and ongoing audits further helped to lower DPPM for open-circuit defects. The issue of short circuits was addressed by controlling contamination in the PCB exposure, develop and etching process, and implementing proper sampling frequency to minimize the escape to the CM. All of these combined efforts have helped reduce the DPPM post reflow and minimize scrap cost. Communication Strategies When switching from in-house manufacturing to an overseas manufacturer, a number of time, distance and translation difficulties get added to resolving daily line issues. As an OEM, it is essential to keep your documentation correct and updated because misinformation can cause yield loss, a delay in shipments to the customer and chargebacks to an OEM. A PCB is a complex commodity. When parts are rejected, it requires a good understanding of the PCB manufacturing process, the acceptance criteria, failure analysis of defects and root cause determination. Since the CM did not have a very knowledgeable PCB team, OEM component engineers had to mediate when rejections occurred. This helped both sides (the CM and PCB suppliers) understand the defects and work toward an improvement plan. The first step was holding a meeting of suppliers and the CM to understand the CM’s IQC spec and acceptance criteria. Simple lot rejects caused by incorrect paperwork, labeling, cross-outs and other issues were eliminated after an understanding of IQC specs. The lot acceptance rate at IQC improved to 100% within six months. This process was followed up with monthly DPPM data to suppliers and tele-conferences. For major problems, up to five failed samples were sent to the supplier for failure analysis. Additionally, each quarter, all parties met at the CM facility and reviewed DPPM and defects. This gave suppliers a chance to meet the CM team and understand the assembly operations and part movement procedures. Supplier teams reviewed the failure AUGUST 2008 printEd circuit dEsign & faB
Table of Contents Feed for the Digital Edition of Printed Circuit Design & Fab - August 2008 Printed Circuit Design & Fab - July 2008 Contents Our Line Market Watch Around the World Happenings ROI Tip Jar Software Performance Interconnect Strategies Final Finish Forum Product Development Challenges in a Global Market Innovative Modeling Supports Co-Design of the Power Supply Chain, Part 2 Low-Loss Fluoropolymer Copper Clad Laminate Qualifying PCBs Outsourced in Asia Copper Plating and Microvia Fill for Advanced PCBs Off the Shelf Marketplace Ad Index BGA Bulletin Printed Circuit Design & Fab - August 2008 Printed Circuit Design & Fab - August 2008 - Printed Circuit Design & Fab - July 2008 (Page Cover1) Printed Circuit Design & Fab - August 2008 - Printed Circuit Design & Fab - July 2008 (Page Cover2) Printed Circuit Design & Fab - August 2008 - Printed Circuit Design & Fab - July 2008 (Page 1) Printed Circuit Design & Fab - August 2008 - Contents (Page 2) Printed Circuit Design & Fab - August 2008 - Contents (Page 3) Printed Circuit Design & Fab - August 2008 - Our Line (Page 4) Printed Circuit Design & Fab - August 2008 - Our Line (Page 5) Printed Circuit Design & Fab - August 2008 - Market Watch (Page 6) Printed Circuit Design & Fab - August 2008 - Market Watch (Page 7) Printed Circuit Design & Fab - August 2008 - Around the World (Page 8) Printed Circuit Design & Fab - August 2008 - Around the World (Page 9) Printed Circuit Design & Fab - August 2008 - Around the World (Page 10) Printed Circuit Design & Fab - August 2008 - Around the World (Page 11) Printed Circuit Design & Fab - August 2008 - Happenings (Page 12) Printed Circuit Design & Fab - August 2008 - Happenings (Page 13) Printed Circuit Design & Fab - August 2008 - ROI (Page 14) Printed Circuit Design & Fab - August 2008 - ROI (Page 15) Printed Circuit Design & Fab - August 2008 - Tip Jar (Page 16) Printed Circuit Design & Fab - August 2008 - Tip Jar (Page W1) Printed Circuit Design & Fab - August 2008 - Tip Jar (Page W2) Printed Circuit Design & Fab - August 2008 - Tip Jar (Page W3) Printed Circuit Design & Fab - August 2008 - Tip Jar (Page W4) Printed Circuit Design & Fab - August 2008 - Tip Jar (Page W5) Printed Circuit Design & Fab - August 2008 - Tip Jar (Page W6) Printed Circuit Design & Fab - August 2008 - Tip Jar (Page W7) Printed Circuit Design & Fab - August 2008 - Tip Jar (Page W8) Printed Circuit Design & Fab - August 2008 - Tip Jar (Page W9) Printed Circuit Design & Fab - August 2008 - Tip Jar (Page W10) Printed Circuit Design & Fab - August 2008 - Tip Jar (Page W11) Printed Circuit Design & Fab - August 2008 - Tip Jar (Page W12) Printed Circuit Design & Fab - August 2008 - Tip Jar (Page W13) Printed Circuit Design & Fab - August 2008 - Tip Jar (Page W14) Printed Circuit Design & Fab - August 2008 - Tip Jar (Page W15) Printed Circuit Design & Fab - August 2008 - Tip Jar (Page W16) Printed Circuit Design & Fab - August 2008 - Tip Jar (Page 17) Printed Circuit Design & Fab - August 2008 - Software Performance (Page 18) Printed Circuit Design & Fab - August 2008 - Software Performance (Page 19) Printed Circuit Design & Fab - August 2008 - Interconnect Strategies (Page 20) Printed Circuit Design & Fab - August 2008 - Interconnect Strategies (Page 21) Printed Circuit Design & Fab - August 2008 - Interconnect Strategies (Page 22) Printed Circuit Design & Fab - August 2008 - Final Finish Forum (Page 23) Printed Circuit Design & Fab - August 2008 - Product Development Challenges in a Global Market (Page 24) Printed Circuit Design & Fab - August 2008 - Product Development Challenges in a Global Market (Page 25) Printed Circuit Design & Fab - August 2008 - Product Development Challenges in a Global Market (Page 26) Printed Circuit Design & Fab - August 2008 - Product Development Challenges in a Global Market (Page 27) Printed Circuit Design & Fab - August 2008 - Innovative Modeling Supports Co-Design of the Power Supply Chain, Part 2 (Page 28) Printed Circuit Design & Fab - August 2008 - Innovative Modeling Supports Co-Design of the Power Supply Chain, Part 2 (Page 29) Printed Circuit Design & Fab - August 2008 - Innovative Modeling Supports Co-Design of the Power Supply Chain, Part 2 (Page 30) Printed Circuit Design & Fab - August 2008 - Low-Loss Fluoropolymer Copper Clad Laminate (Page 31) Printed Circuit Design & Fab - August 2008 - Low-Loss Fluoropolymer Copper Clad Laminate (Page 32) Printed Circuit Design & Fab - August 2008 - Low-Loss Fluoropolymer Copper Clad Laminate (Page 33) Printed Circuit Design & Fab - August 2008 - Low-Loss Fluoropolymer Copper Clad Laminate (Page 34) Printed Circuit Design & Fab - August 2008 - Low-Loss Fluoropolymer Copper Clad Laminate (Page 35) Printed Circuit Design & Fab - August 2008 - Qualifying PCBs Outsourced in Asia (Page 36) Printed Circuit Design & Fab - August 2008 - Qualifying PCBs Outsourced in Asia (Page 37) Printed Circuit Design & Fab - August 2008 - Qualifying PCBs Outsourced in Asia (Page 38) Printed Circuit Design & Fab - August 2008 - Qualifying PCBs Outsourced in Asia (Page 39) Printed Circuit Design & Fab - August 2008 - Copper Plating and Microvia Fill for Advanced PCBs (Page 40) Printed Circuit Design & Fab - August 2008 - Copper Plating and Microvia Fill for Advanced PCBs (Page 41) Printed Circuit Design & Fab - August 2008 - Copper Plating and Microvia Fill for Advanced PCBs (Page 42) Printed Circuit Design & Fab - August 2008 - Off the Shelf (Page 43) Printed Circuit Design & Fab - August 2008 - Marketplace (Page 44) Printed Circuit Design & Fab - August 2008 - Marketplace (Page 45) Printed Circuit Design & Fab - August 2008 - Marketplace (Page 46) Printed Circuit Design & Fab - August 2008 - Ad Index (Page 47) Printed Circuit Design & Fab - August 2008 - BGA Bulletin (Page 48) Printed Circuit Design & Fab - August 2008 - BGA Bulletin (Page Cover3) Printed Circuit Design & Fab - August 2008 - BGA Bulletin (Page Cover4)
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