Printed Circuit Design & Fab - November 2008 - (Page 41) SOLDER rESiStS taBlE 1. Properties of new peelable resist. application guide Specifications where a thick film that has excellent cohesive strength, Application Method Horizontal screen printing yet remains soft Screen Type 10 - 20 threads / cm polyester enough to be easScreen Mesh Diameter ~140 µm ily removed, is Stencil Thickness Thickness 400 µm key. The coating Squeegee Type 60 - 65º Shore A hardness, rounded print edge and the application parameters Film Thickness Optimum 450 - 500 µm must be such to Thermal Cure 150ºC for 30 minutes or 160ºC for 10 to 15 minutes allow the film to Hole Plug 3 mm holes plugged be applied over the circuit board, encapsulating all necessary areas includthe portion of the film actually soldered. ing the plugging of plated holes. In this The film matrix has shrunk and the film latter respect, the rheology (or more has badly discolored. Film flexibility and loosely called structure) of the product is peelability were lost. all-important. The rheology of the peelable must allow for ease of application of New Product Development a thick film– but without any film slumpTaking into consideration the above chaling or sagging or thinning of the film over lenge, a project to develop a new peelable the plugged hole. The formulator’s art is resist product that would meet these new in obtaining excellent printing properties goals was undertaken. It had the followalong with equally excellent hole plugging ing objectives: to produce a final prodwithout any sagging or additional flow of uct capable of resisting multiple highthe freshly applied film. FiGurE 2 gives temperature soldering processes, as seen with lead-free alloys, and to only use raw the rheology curve of such a coating. materials that did not compromise health The vertical axis refers to viscosand safety directives and regulations. ity, whereas the horizontal axis refers to With the initial development work shear rate. The coating was placed on a now complete, the new product has been rheometer, and a progressive stress was given a thorough testing with numerous placed upon the coating. The resulting PCB customers and assemblers, using rheology curve (seen here as the red both multiple eutectic soldering processes line) shows what happens to the film at and lead-free alloys. Results thus far show different shear rates or with increasing the new system to be compatible to strain. Under low-stress conditions, or both eutectic soldering and to the more gravitational forces, the coating exhibits aggressive lead-free soldering processes. a very high viscosity (refer to the red line The initial product 2 Figure data can be found in on the left of the graph). As shear rate or stress is increasingly applied (with either taBlE 1. mixing or screen printing), the viscosity To those who use peelable coating, is progressively lowered, and the coating much of the above data would be considbecomes thinner and more liquid. Howered standard. The essence to a successful ever, take the Figure 5 source of shear or stress peelable coating is found not only in the Figure 4 away, and the viscosity of the coating will formulation, but also in the processing, return to its original high value. This loss in viscosity, or “structure,” is common with many liquid coating systems (solder mask, etch resists, etc.), but it is an important property with peelable coatings, as it will define the ability of a particular product to be successfully printed into plated holes without any thinning of the film around the barrels of the holes. FiGurES Figure51. these properties of the 3, 4 and show coating. In these examples, the coatings have been subjected to a lead-free hot air level process first. Figure 1 showed the result of an existing peelable system that had been subjected to a double pass through a lead-free soldering operation at 300º C. FiGurE 6 shows the new peelable system after it has been subjected to one hot air level and two wave solder processes using lead-free alloys. This paper has sought to outline the challenge that lead-free alloys have brought to the area of peelable resist technology. To meet these challenges, coatings manufacturers need to address not only the technological hurdles, but also to keep in mind the current health and safety constraints that are placed on raw materials. New materials that are acceptable for use are combined with the added expertise of the formulators to produce a final Figure 3 can perform at new lead-free product that soldering temperatures. pCd&f ian Mcdonald is an international technical sales support executive with Sun Chemical and can be reached at ian. mcdonald@sunchemical.com. F Figure 2 acknowlEdGEMEntS the author would like to thank all the technical personnel in the Circuits Research and Development laboratory at MSN (england) without whose help and advice this paper could not have been written. Figure 4 Figure 5 FiGurE 4. New peelable resist after lead-free soldering. NOVEMBER 2008 FiGurE 5. New peelable resist after lead-free soldering. Figure 6 FiGurE 6. New peelable resist film after exposure to hot air leveling and two lead-free soldering operations. printEd CirCuit dESign & fAB 41
Table of Contents Feed for the Digital Edition of Printed Circuit Design & Fab - November 2008 Printed Circuit Design & Fab - November 2008 Contents Our Line Market Watch Around the World Happenings ROI Positive Plating Ten Tips to Improve Manufacturability 3D Chip-Package-Board Modeling Improving Circuit Simulation With The Addition Of Real Measurements Ad Index PCB West: Interview with NBS Design Inc. The Influence of Final Finish on Lead-Free Assembly Reliability The Lead-free Soldering Challenges for Peelable Resists Off the Shelf Marketplace BGA Bulletin Printed Circuit Design & Fab - November 2008 Printed Circuit Design & Fab - November 2008 - (Page Intro) Printed Circuit Design & Fab - November 2008 - Printed Circuit Design & Fab - November 2008 (Page Cover1) Printed Circuit Design & Fab - November 2008 - Printed Circuit Design & Fab - November 2008 (Page Cover2) Printed Circuit Design & Fab - November 2008 - Printed Circuit Design & Fab - November 2008 (Page 1) Printed Circuit Design & Fab - November 2008 - Contents (Page 2) Printed Circuit Design & Fab - November 2008 - Contents (Page 3) Printed Circuit Design & Fab - November 2008 - Our Line (Page 4) Printed Circuit Design & Fab - November 2008 - Our Line (Page 5) Printed Circuit Design & Fab - November 2008 - Market Watch (Page 6) Printed Circuit Design & Fab - November 2008 - Market Watch (Page 7) Printed Circuit Design & Fab - November 2008 - Around the World (Page 8) Printed Circuit Design & Fab - November 2008 - Around the World (Page 9) Printed Circuit Design & Fab - November 2008 - Around the World (Page 10) Printed Circuit Design & Fab - November 2008 - Around the World (Page 11) Printed Circuit Design & Fab - November 2008 - Happenings (Page 12) Printed Circuit Design & Fab - November 2008 - Happenings (Page 13) Printed Circuit Design & Fab - November 2008 - ROI (Page 14) Printed Circuit Design & Fab - November 2008 - ROI (Page 15) Printed Circuit Design & Fab - November 2008 - Positive Plating (Page 16) Printed Circuit Design & Fab - November 2008 - Positive Plating (Page 17) Printed Circuit Design & Fab - November 2008 - Ten Tips to Improve Manufacturability (Page 18) Printed Circuit Design & Fab - November 2008 - Ten Tips to Improve Manufacturability (Page 19) Printed Circuit Design & Fab - November 2008 - Ten Tips to Improve Manufacturability (Page 20) Printed Circuit Design & Fab - November 2008 - Ten Tips to Improve Manufacturability (Page 21) Printed Circuit Design & Fab - November 2008 - Ten Tips to Improve Manufacturability (Page 22) Printed Circuit Design & Fab - November 2008 - Ten Tips to Improve Manufacturability (Page 23) Printed Circuit Design & Fab - November 2008 - 3D Chip-Package-Board Modeling (Page 24) Printed Circuit Design & Fab - November 2008 - 3D Chip-Package-Board Modeling (Page 25) Printed Circuit Design & Fab - November 2008 - 3D Chip-Package-Board Modeling (Page 26) Printed Circuit Design & Fab - November 2008 - 3D Chip-Package-Board Modeling (Page 27) Printed Circuit Design & Fab - November 2008 - 3D Chip-Package-Board Modeling (Page 28) Printed Circuit Design & Fab - November 2008 - 3D Chip-Package-Board Modeling (Page 29) Printed Circuit Design & Fab - November 2008 - Improving Circuit Simulation With The Addition Of Real Measurements (Page 30) Printed Circuit Design & Fab - November 2008 - Improving Circuit Simulation With The Addition Of Real Measurements (Page 31) Printed Circuit Design & Fab - November 2008 - Ad Index (Page 32) Printed Circuit Design & Fab - November 2008 - Ad Index (Page 33) Printed Circuit Design & Fab - November 2008 - PCB West: Interview with NBS Design Inc. (Page 34) Printed Circuit Design & Fab - November 2008 - PCB West: Interview with NBS Design Inc. (Page 35) Printed Circuit Design & Fab - November 2008 - The Influence of Final Finish on Lead-Free Assembly Reliability (Page 36) Printed Circuit Design & Fab - November 2008 - The Influence of Final Finish on Lead-Free Assembly Reliability (Page 37) Printed Circuit Design & Fab - November 2008 - The Influence of Final Finish on Lead-Free Assembly Reliability (Page 38) Printed Circuit Design & Fab - November 2008 - The Influence of Final Finish on Lead-Free Assembly Reliability (Page InsertA) Printed Circuit Design & Fab - November 2008 - The Influence of Final Finish on Lead-Free Assembly Reliability (Page InsertB) Printed Circuit Design & Fab - November 2008 - The Influence of Final Finish on Lead-Free Assembly Reliability (Page 39) Printed Circuit Design & Fab - November 2008 - The Lead-free Soldering Challenges for Peelable Resists (Page 40) Printed Circuit Design & Fab - November 2008 - The Lead-free Soldering Challenges for Peelable Resists (Page 41) Printed Circuit Design & Fab - November 2008 - The Lead-free Soldering Challenges for Peelable Resists (Page 42) Printed Circuit Design & Fab - November 2008 - Off the Shelf (Page 43) Printed Circuit Design & Fab - November 2008 - Marketplace (Page 44) Printed Circuit Design & Fab - November 2008 - Marketplace (Page 45) Printed Circuit Design & Fab - November 2008 - Marketplace (Page 46) Printed Circuit Design & Fab - November 2008 - Marketplace (Page 47) Printed Circuit Design & Fab - November 2008 - BGA Bulletin (Page 48) Printed Circuit Design & Fab - November 2008 - BGA Bulletin (Page Cover3) Printed Circuit Design & Fab - November 2008 - BGA Bulletin (Page Cover4) Printed Circuit Design & Fab - November 2008 - BGA Bulletin (Page S1) Printed Circuit Design & Fab - November 2008 - BGA Bulletin (Page S2) Printed Circuit Design & Fab - November 2008 - BGA Bulletin (Page S3) Printed Circuit Design & Fab - November 2008 - BGA Bulletin (Page S4) Printed Circuit Design & Fab - November 2008 - BGA Bulletin (Page S5) Printed Circuit Design & Fab - November 2008 - BGA Bulletin (Page S6) Printed Circuit Design & Fab - November 2008 - BGA Bulletin (Page S7) Printed Circuit Design & Fab - November 2008 - BGA Bulletin (Page S8) Printed Circuit Design & Fab - November 2008 - BGA Bulletin (Page S9) Printed Circuit Design & Fab - November 2008 - BGA Bulletin (Page S10) Printed Circuit Design & Fab - November 2008 - BGA Bulletin (Page S11) Printed Circuit Design & Fab - November 2008 - BGA Bulletin (Page S12) Printed Circuit Design & Fab - November 2008 - BGA Bulletin (Page S13) Printed Circuit Design & Fab - November 2008 - BGA Bulletin (Page S14) Printed Circuit Design & Fab - November 2008 - BGA Bulletin (Page S15) Printed Circuit Design & Fab - November 2008 - BGA Bulletin (Page S16) Printed Circuit Design & Fab - November 2008 - BGA Bulletin (Page S17) Printed Circuit Design & Fab - November 2008 - BGA Bulletin (Page S18) Printed Circuit Design & Fab - November 2008 - BGA Bulletin (Page S19) Printed Circuit Design & Fab - November 2008 - BGA Bulletin (Page S20) Printed Circuit Design & Fab - November 2008 - BGA Bulletin (Page S21) Printed Circuit Design & Fab - November 2008 - BGA Bulletin (Page S22) Printed Circuit Design & Fab - November 2008 - BGA Bulletin (Page S23) Printed Circuit Design & Fab - November 2008 - BGA Bulletin (Page S24) Printed Circuit Design & Fab - November 2008 - BGA Bulletin (Page S25) Printed Circuit Design & Fab - November 2008 - BGA Bulletin (Page S26) Printed Circuit Design & Fab - November 2008 - BGA Bulletin (Page S27) Printed Circuit Design & Fab - November 2008 - BGA Bulletin (Page S28) Printed Circuit Design & Fab - November 2008 - BGA Bulletin (Page S29) Printed Circuit Design & Fab - November 2008 - BGA Bulletin (Page S30) Printed Circuit Design & Fab - November 2008 - BGA Bulletin (Page S31) Printed Circuit Design & Fab - November 2008 - BGA Bulletin (Page S32) Printed Circuit Design & Fab - November 2008 - BGA Bulletin (Page S33) Printed Circuit Design & Fab - November 2008 - BGA Bulletin (Page S34) Printed Circuit Design & Fab - November 2008 - BGA Bulletin (Page S35) Printed Circuit Design & Fab - November 2008 - BGA Bulletin (Page S36) Printed Circuit Design & Fab - November 2008 - BGA Bulletin (Page S37) Printed Circuit Design & Fab - November 2008 - BGA Bulletin (Page S38) Printed Circuit Design & Fab - November 2008 - BGA Bulletin (Page S39) Printed Circuit Design & Fab - November 2008 - BGA Bulletin (Page S40) Printed Circuit Design & Fab - November 2008 - BGA Bulletin (Page S41) Printed Circuit Design & Fab - November 2008 - BGA Bulletin (Page S42)
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