Printed Circuit Design & Fab - December 2008 - (Page 22) Improving lead-free Solder reliability ENEPIG is a unique surface finish that exhibits improved solder joint reliability when it is used with lead-free SAC alloys. more than 25% of the intermetallic compound (IMC) at the fracture interface. SEM and FIB elemental analysis of the different layers of the IMC were examined. The distribution of Pd was not uniform but was found in segregated clusters in the IMC. Additional details using FIB showed that Pd did not form an alloy Pd/Pb with the lead, and secondly, the alloy Pd/Sn that was formed remained segregated in clusters on top of the Ni/Sn alloy, creating a stress riser. This segregation allowed irregularities and did not control the propagation of the Ni/Sn IMC formation, contributing to its lack of robustness when subjected to the conditions of testing (FiGurE 1). rOHS reQUIreMeNTS have made it necessary once again to revisit all of the available surface finish options. Electroless nickel / electroless palladium / immersion gold (ENEPIG) is unique in the fact that it forms a robust, higher strength solder joint with SAC 305 LF alloy, as compared gEorgE to the solder joint formed with eutecmilAd tic solder. ENEPIG is sometimes referred to as the “universal” finish, because of the versatility of its applications. ENEPIG is suitable for soldering, gold wire bonding, aluminum wire bonding and contact resistance. ENEPIG is formed by the sequential deposition of electroless Ni (120 to 240 micro inches) followed by 2 to 8 micro inches of electroless Pd with an immersion gold flash of 1 to 2 micro inches on the top. ENEPIG was originally introduced in the mid-1990s. Although it was accepted and is in use as a finish with eutectic solder, universal acceptance was lacking. There was an inherent weakness in the solder joint, especially when it was subjected to high stress like thermal artificial ageing and some specific OEM tests like the “drop test.” Recent studies involving ball pull testing after artificial ageing were able to shed some light on the reasons why. In this study, eutectic balls were soldered to a test vehicle with BGA soldermask defined pads and an ENEPIG surface finish. The test was then incubated at 150o C for up to 1000 hours. The ball pull investigation indicated that the majority of the balls showed The same testing was conducted as described above, the only difference being that the balls were not eutectic solder but SAC 305 (Sn3.0Ag0.5Cu). Data from ball pull testing, conducted after the prolonged thermal stress, showed a very robust solder joint with all fractures occurring in the solder and not at the interface. SEM and FIB elemental analysis showed a (Cu,Ni) Sn IMC with an even distribution of Pd, (Cu,Ni) Sn+Pd. With SAC 305, the Cu was an integral part of the IMC, and its presence allowed a very even Pd distribution. The presence of the palladium in the joint interface dramatically reduced intermetallic compound propagation. The question remained; is it the presence of Pb in eutectic solder or is it the presence of copper in the SAC 305 that made the dramatic difference? The answer came when ENEPIG was soldered using Sn3.5Ag in place of SAC 305. With the Sn3.5Ag, the propagation of the IMC was similar to eutectic solder and did not give the solder joint robustness that was observed with SAC alloy. SEM and FIB analysis showed that the Pd/Sn alloy was clustered and segregated on top of the Ni/Sn. Similar testing with ENIG showed good ball pull values with the fracture occurred in the ball and not at the interface, in spite of the fact that the IMC showed similar propagation. The conclusion of these studies indicate that ENEPIG is unique in the fact that it is the one surface finish that does better with LF SAC alloy than it did with eutectic solder. ENEPIG will take its place in the industry as the need for very high reliability solder joints becomes evident. pCd&f FiGurE 1. a series of SeM micrographs of the IMC formed as a function of thermal ageing. On the left we have eNIG and eNePIG with eutectic solder at zero (as soldered) and after 300 and 1000 hours respectively. In contrast on the right are the respective IMCs using SaC 305. 22 GEorGE Milad is the national accounts manager of technology at Uyemura International Corporation (UIC) and can be reached at gmilad@uyemura.com. DECEMBER 2008 printEd CirCuit dESign & fAB
Table of Contents Feed for the Digital Edition of Printed Circuit Design & Fab - December 2008 Printed Circuit Design & Fab - December 2008 Contents Our Line Market Watch Around the World Happenings ROI Global Sourcing EMC for the Real World Interconnect Strategies On the Forefront Final Finish Forum Test and Inspection Electronic System Design Data Management 101 Designers Take on Technology Challenges in 2008 PCB Signal Integrity, Power Integrity and EMC Challenges What’s in a Name? Ad Index PCB Dielectric Materials for High-Speed Applications Off the Shelf Marketplace BGA Bulletin Printed Circuit Design & Fab - December 2008 Printed Circuit Design & Fab - December 2008 - (Page Intro) Printed Circuit Design & Fab - December 2008 - Printed Circuit Design & Fab - December 2008 (Page Cover1) Printed Circuit Design & Fab - December 2008 - Printed Circuit Design & Fab - December 2008 (Page Cover2) Printed Circuit Design & Fab - December 2008 - Printed Circuit Design & Fab - December 2008 (Page 1) Printed Circuit Design & Fab - December 2008 - Contents (Page 2) Printed Circuit Design & Fab - December 2008 - Contents (Page 3) Printed Circuit Design & Fab - December 2008 - Market Watch (Page 4) Printed Circuit Design & Fab - December 2008 - Market Watch (Page 5) Printed Circuit Design & Fab - December 2008 - Around the World (Page 6) Printed Circuit Design & Fab - December 2008 - Around the World (Page 7) Printed Circuit Design & Fab - December 2008 - Around the World (Page 8) Printed Circuit Design & Fab - December 2008 - Around the World (Page 9) Printed Circuit Design & Fab - December 2008 - Around the World (Page 10) Printed Circuit Design & Fab - December 2008 - Around the World (Page 11) Printed Circuit Design & Fab - December 2008 - Happenings (Page 12) Printed Circuit Design & Fab - December 2008 - Happenings (Page 13) Printed Circuit Design & Fab - December 2008 - ROI (Page 14) Printed Circuit Design & Fab - December 2008 - Global Sourcing (Page 15) Printed Circuit Design & Fab - December 2008 - EMC for the Real World (Page 16) Printed Circuit Design & Fab - December 2008 - EMC for the Real World (Page 16a) Printed Circuit Design & Fab - December 2008 - EMC for the Real World (Page 16b) Printed Circuit Design & Fab - December 2008 - EMC for the Real World (Page 17) Printed Circuit Design & Fab - December 2008 - Interconnect Strategies (Page 18) Printed Circuit Design & Fab - December 2008 - Interconnect Strategies (Page 19) Printed Circuit Design & Fab - December 2008 - Interconnect Strategies (Page 20) Printed Circuit Design & Fab - December 2008 - On the Forefront (Page 21) Printed Circuit Design & Fab - December 2008 - Final Finish Forum (Page 22) Printed Circuit Design & Fab - December 2008 - Test and Inspection (Page 23) Printed Circuit Design & Fab - December 2008 - Electronic System Design (Page 24) Printed Circuit Design & Fab - December 2008 - Electronic System Design (Page 25) Printed Circuit Design & Fab - December 2008 - Electronic System Design (Page 26) Printed Circuit Design & Fab - December 2008 - Electronic System Design (Page 27) Printed Circuit Design & Fab - December 2008 - Data Management 101 (Page 28) Printed Circuit Design & Fab - December 2008 - Data Management 101 (Page 29) Printed Circuit Design & Fab - December 2008 - Data Management 101 (Page 30) Printed Circuit Design & Fab - December 2008 - Designers Take on Technology Challenges in 2008 (Page 31) Printed Circuit Design & Fab - December 2008 - Designers Take on Technology Challenges in 2008 (Page 32) Printed Circuit Design & Fab - December 2008 - Designers Take on Technology Challenges in 2008 (Page 32a) Printed Circuit Design & Fab - December 2008 - Designers Take on Technology Challenges in 2008 (Page 32b) Printed Circuit Design & Fab - December 2008 - Designers Take on Technology Challenges in 2008 (Page 33) Printed Circuit Design & Fab - December 2008 - PCB Signal Integrity, Power Integrity and EMC Challenges (Page 34) Printed Circuit Design & Fab - December 2008 - PCB Signal Integrity, Power Integrity and EMC Challenges (Page 35) Printed Circuit Design & Fab - December 2008 - PCB Signal Integrity, Power Integrity and EMC Challenges (Page 36) Printed Circuit Design & Fab - December 2008 - PCB Signal Integrity, Power Integrity and EMC Challenges (Page 37) Printed Circuit Design & Fab - December 2008 - What’s in a Name? (Page 38) Printed Circuit Design & Fab - December 2008 - Ad Index (Page 39) Printed Circuit Design & Fab - December 2008 - PCB Dielectric Materials for High-Speed Applications (Page 40) Printed Circuit Design & Fab - December 2008 - PCB Dielectric Materials for High-Speed Applications (Page 41) Printed Circuit Design & Fab - December 2008 - PCB Dielectric Materials for High-Speed Applications (Page 42) Printed Circuit Design & Fab - December 2008 - Off the Shelf (Page 43) Printed Circuit Design & Fab - December 2008 - Marketplace (Page 44) Printed Circuit Design & Fab - December 2008 - Marketplace (Page 45) Printed Circuit Design & Fab - December 2008 - Marketplace (Page 46) Printed Circuit Design & Fab - December 2008 - Marketplace (Page 47) Printed Circuit Design & Fab - December 2008 - BGA Bulletin (Page 48) Printed Circuit Design & Fab - December 2008 - BGA Bulletin (Page Cover3) Printed Circuit Design & Fab - December 2008 - BGA Bulletin (Page Cover4)
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