Printed Circuit Design & Fab - January 2009 - (Page 27) LAMINATE MatErialS with a laminate resin content of 50%. The Dk testing yields only slightly higher values using the Bereskin Stripline method when compared to Split Post Cavity method. Therefore, for the purpose of Dk testing, the two methods are very comparable and yield similar results. However, when testing identical samples using these two methods, the differences become apparent when comparing the Df values (FiGurES 8 and 9). The values for the Split Post Cavity Method are 20% to 30% lower for each material than for those derived using the Bereskin Stripline Method. When comparing laminate data sheets, the designer should be aware that the product tested using certain methods may appear to have better loss properties than a product tested using the another method. More complete information can assist in reducing the design cycle and prototyping steps and aid the designer in making stack up selections that reduce cost and/or provide a cost to performance advantage. Furthermore, characterization of the material in a standardized test vehicle should be performed to fully understand the performance of high-speed digital materials. Data sheets can be useful tools during an initial material electrical properties comparison, if the test methods used to derive the data are identical. Care should be taken to fully understand any differences between the test methods used to derive the properties as they may produce significantly different results. Differences in the test method can make a one-to-one comparison misleading and can result in major performance issues when a laminate substitution is made and may potentially result in a nonfunctioning system. One of the most common mistakes that is made is making a material substitution without considering the actual electrical performance properties of the laminate material. PCD&F MichaEl Gay is the director of emerging products for Isola Group. He can be reached at Michael.Gay@isola-group. com. rich PanGiEr is the director of OEM marketing for the Isola Group. He can be reached at Rich.Pangier@isolagroup.com rEFErEncES 1. Khan, Subhotosh PhD; “Comparison of the Dielectric Constant and Dissipation Factors of non-woven Aramid/FR4 and Glass/FR4 laminates, Volume: 26 Issue 2, Circuit World, ” June 2000. 2. P Hamilton, G. Brist, B. Guy Jr and J. Schrad. er; “Humidity-Dependent Loss in PCB Substrates, IPC/APEX Expo February 2007 ” . 3. Neves, Bob; “Permittivity/Dielectric Constant: Do the Math, Circuitree November 1996. ” 4. F Hickman, S. Bertling; “Dk/Df testing Meth. ods, tPCA November 2004. ” 5. S. Mirshafiei and D Enos, Signal Integrity Analysis techniques Used to Characterize PCB Substrates, IPC/APEX April 2004. ” 6. G. Brist; “Design Optimization of SingleEnded and Differential Impedance PCB transmission Lines, Presentation p. 100. ” 7 IPC IPC-tM-650 test Methods Manual . 8. Bogatin, E., “Lossy transmission Lines; Plain and Simple, Presented at PCB West, March ” 2002. A Problem with Substitution A major problem can arise when material substitutions are made using laminate data sheets as a guide, especially when the data is derived from different laminate test methods. While initial impedance calculations look acceptable because the Dk values are similar, the actual board performance may be significantly different and may result in poorly functioning or non-functioning boards. Matching the Dk is important, but matching the Df is critical. FiGurE 10 illustrates a 16-inch strip line using a Mid Dk epoxy resin system. Using Equation 1, with no conductor losses included, it can be determined that the difference between data derived from the Split Post Cavity Method and that derived by the Bereskin Stripline Method is as large as -2.54 dB at 10 GHz which is over 80% of the typical -3 dB budget for a typical transmission line. Making a material substitution is a serious endeavor. A lack of understanding of the actual material properties can result in costly mistakes. Conclusion Data sheets do not provide adequate information for design purposes. The laminate supplier should provide detailed information about the laminate performance over a range of resin contents and frequencies. They should demonstrate expertise and complete understanding of the test method(s) used to acquire the data and how it relates to other methodologies, including PCB and system test methods. JANUARY 2009 PRINTED CIRCUIT DESIGN & FAB 27 http://www.chemcut.net http://www.chemcut.net
Table of Contents Feed for the Digital Edition of Printed Circuit Design & Fab - January 2009 Printed Circuit Design & Fab - January 2009 Contents Our Line Market Watch Around the World Happenings ROI The Signal Doctor Positive Plating Final Finish Forum Making Sense of Laminate Dielectric Properties Design and Fab Tips for Improving Solder Mask Registration Automating the DDRx Interface Verification Process Printed Circuit Design & Fab Annual Buyers Guide: Special Suppliers Section Printed Circuit Design & Fab Annual Buyers Guide: Guide to Products and Services Off the Shelf Marketplace Ad Index BGA Bulletin Printed Circuit Design & Fab - January 2009 Printed Circuit Design & Fab - January 2009 - (Page Intro) Printed Circuit Design & Fab - January 2009 - Printed Circuit Design & Fab - January 2009 (Page Cover1) Printed Circuit Design & Fab - January 2009 - Printed Circuit Design & Fab - January 2009 (Page Cover2) Printed Circuit Design & Fab - January 2009 - Printed Circuit Design & Fab - January 2009 (Page 1) Printed Circuit Design & Fab - January 2009 - Contents (Page 2) Printed Circuit Design & Fab - January 2009 - Contents (Page 3) Printed Circuit Design & Fab - January 2009 - Our Line (Page 4) Printed Circuit Design & Fab - January 2009 - Our Line (Page 5) Printed Circuit Design & Fab - January 2009 - Market Watch (Page 6) Printed Circuit Design & Fab - January 2009 - Market Watch (Page 7) Printed Circuit Design & Fab - January 2009 - Around the World (Page 8) Printed Circuit Design & Fab - January 2009 - Around the World (Page 9) Printed Circuit Design & Fab - January 2009 - Around the World (Page 10) Printed Circuit Design & Fab - January 2009 - Around the World (Page 11) Printed Circuit Design & Fab - January 2009 - Happenings (Page 12) Printed Circuit Design & Fab - January 2009 - Happenings (Page 13) Printed Circuit Design & Fab - January 2009 - ROI (Page 14) Printed Circuit Design & Fab - January 2009 - The Signal Doctor (Page 15) Printed Circuit Design & Fab - January 2009 - The Signal Doctor (Page 16) Printed Circuit Design & Fab - January 2009 - The Signal Doctor (Page 17) Printed Circuit Design & Fab - January 2009 - Positive Plating (Page 18) Printed Circuit Design & Fab - January 2009 - Final Finish Forum (Page 19) Printed Circuit Design & Fab - January 2009 - Making Sense of Laminate Dielectric Properties (Page 20) Printed Circuit Design & Fab - January 2009 - Making Sense of Laminate Dielectric Properties (Page 21) Printed Circuit Design & Fab - January 2009 - Making Sense of Laminate Dielectric Properties (Page 22) Printed Circuit Design & Fab - January 2009 - Making Sense of Laminate Dielectric Properties (Page 23) Printed Circuit Design & Fab - January 2009 - Making Sense of Laminate Dielectric Properties (Page 24) Printed Circuit Design & Fab - January 2009 - Making Sense of Laminate Dielectric Properties (Page 25) Printed Circuit Design & Fab - January 2009 - Making Sense of Laminate Dielectric Properties (Page 26) Printed Circuit Design & Fab - January 2009 - Making Sense of Laminate Dielectric Properties (Page 27) Printed Circuit Design & Fab - January 2009 - Design and Fab Tips for Improving Solder Mask Registration (Page 28) Printed Circuit Design & Fab - January 2009 - Design and Fab Tips for Improving Solder Mask Registration (Page 29) Printed Circuit Design & Fab - January 2009 - Design and Fab Tips for Improving Solder Mask Registration (Page 30) Printed Circuit Design & Fab - January 2009 - Automating the DDRx Interface Verification Process (Page 31) Printed Circuit Design & Fab - January 2009 - Automating the DDRx Interface Verification Process (Page 32) Printed Circuit Design & Fab - January 2009 - Automating the DDRx Interface Verification Process (Page 33) Printed Circuit Design & Fab - January 2009 - Printed Circuit Design & Fab Annual Buyers Guide: Special Suppliers Section (Page 34) Printed Circuit Design & Fab - January 2009 - Printed Circuit Design & Fab Annual Buyers Guide: Special Suppliers Section (Page 35) Printed Circuit Design & Fab - January 2009 - Printed Circuit Design & Fab Annual Buyers Guide: Guide to Products and Services (Page 36) Printed Circuit Design & Fab - January 2009 - Printed Circuit Design & Fab Annual Buyers Guide: Guide to Products and Services (Page 37) Printed Circuit Design & Fab - January 2009 - Printed Circuit Design & Fab Annual Buyers Guide: Guide to Products and Services (Page 38) Printed Circuit Design & Fab - January 2009 - Printed Circuit Design & Fab Annual Buyers Guide: Guide to Products and Services (Page 39) Printed Circuit Design & Fab - January 2009 - Printed Circuit Design & Fab Annual Buyers Guide: Guide to Products and Services (Page 40) Printed Circuit Design & Fab - January 2009 - Printed Circuit Design & Fab Annual Buyers Guide: Guide to Products and Services (Page 41) Printed Circuit Design & Fab - January 2009 - Printed Circuit Design & Fab Annual Buyers Guide: Guide to Products and Services (Page 42) Printed Circuit Design & Fab - January 2009 - Off the Shelf (Page 43) Printed Circuit Design & Fab - January 2009 - Marketplace (Page 44) Printed Circuit Design & Fab - January 2009 - Marketplace (Page 45) Printed Circuit Design & Fab - January 2009 - Ad Index (Page 46) Printed Circuit Design & Fab - January 2009 - Ad Index (Page 47) Printed Circuit Design & Fab - January 2009 - BGA Bulletin (Page 48) Printed Circuit Design & Fab - January 2009 - BGA Bulletin (Page Cover3) Printed Circuit Design & Fab - January 2009 - BGA Bulletin (Page Cover4)
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