Printed Circuit Design & Fab - January 2009 - (Page 30)

SOLDER MaSk dFa a solder mask registration problem, the screen is 0.005 inches in width and customer’s initial PCB design needs to 0.020 inches in total length. be reviewed for design for manufacturAs the solder mask shifts relative ing (DFM) violations. The updated to the copper artwork, a measurable design should then be reviewed with a offset can be identified in both X and PCB supplier to minimize solder mask Y directions by taking the difference misregistration issues. It is also imporbetween the measurements and dividtant to note that different PCB vendors ing by two (FiGurE 3B). The positive will use different solder mask openings, or negative sign of the calculation so they must be alerted to the speindicates the direction of solder mask cial requirements for fine-pitch BGA/ misregistration. For example, if X2 > CSP2,3. Minimizing solder mask clearX1, then the solder mask has shifted toward the positive X direction of ances around array pads can reduce the Cartesian coordinate system. The this problem; however, it also may same principle applies for Y. If Y2 reduce the number of capable vendors. >Y1, then the solder mask has shifted Vendors should also include a capatoward the positive Y direction. bility study (Cpk) on solder mask regisTo verify solder mask registration, tration and have a history of producing a minimum of three “chevron” solder fine-feature PCBs. Vendors should be mask registration features are recomable to perform up-front DfM review mended at the corners of the PCB of the PCB layer design and provide to assist in solder mask registration details on solder mask opening and verification (FiGurE 4). If the solder alignment tolerances for critical finepitch BGA/CSP applications. The venmask registration features are located dors should use an electronic DfM tool on break-off tabs of a PCB panel, the that provides design rule checks (DRC), break-off tabs could be removed prior and the DRC should be reviewed by to the test process, and the solder customers and PCB vendors prior to mask registration features would not the start of board fabrication. be available for failure analysis. In From the perspective of the assemthis case, the solder mask misregistrably provider, receiving inspection must tion issue cannot be identified unless be equipped with adequate microscope the fine-pitch BGA/CSP component is measurement capability for inspection removed from the PCB. Therefore, the of fine-pitch BGA/CSP or high-density preference would be to have the solder areas. The recommended magnification mask registration features on each is 10X minimum for 0.8-mm pitch, PCB module. The solder mask regis15X minimum for 0.65-mm pitch and tration features could be located close 20X minimum for 0.5-mm pitch comto the global fiducials while observing ponents. A heightened sampling plan fiducial clearance requirements. It is should also be established to obtain also helpful to have a component refmeasurements of the chevron registraerence designator, such as CV1, next tion marks and should be performed to each solder mask registration feaFigure 3A. Chevronfor inspection and feature design. Figure 3B. Calculations. on a predetermined basis. ture solder mask registration measurement reference. Figure 3. Chevron solder mask registration feature design and calculation. To further reduce the possibility of Conclusion Solder shorts under fine-pitch BGA/ CSP components caused by solder mask misregistration can be very difficult to detect on a completed PCB assembly using a standard x-ray processes. To better control solder mask design and registration, a set of chevron solder mask registration features can be designed on the board to aid vendors and assembly providers in obtaining verification of solder mask registraFigure 4. Chevron solder mask mask regisFiGurE 4. Chevron solder registration feature location. during inspection. If a defective tion tration feature location. PCB assembly is suspected of solder 30 shorts under the fine-pitch BGA/CSP component and has not been detected by x-ray, the solder mask registration features can be used as a debugging tool without having to remove the fine-pitch BGA/CSP component. This will ultimately reduce time and cost for investigation of the solder short defect. With additional considerations to reduce the possibility of a solder mask registration issue, PCB vendors’ capabilities on solder mask registration tolerance should be well understood, and the solder mask registration tolerance and requirements should be included in the design fabrication drawing. For the assembly provider, critical areas, such as fine-pitch BGA/CSP sites, should be identified and conveyed to receiving inspection personnel. The inspection criteria may require sampling of the fine features with proper equipment, such as microscopes with measurement systems and adequate magnification. With the registration monitoring feature design and proper board fabrication considerations, solder mask registration issues can be minimized and possibly eliminated. The time invested on the PCB design review and verification of solder mask registration will result in better assembly process and higher yields. PCD&F acknowlEdGEMEntS the author would like to thank tom Cipielewski, Paul Neathway, Quyen Chu and Peter Verbiest of Jabil’s Global Operations Services Manufacturing Engineering for their contributions and supports. rEFErEncES 1. Ken Gilleo, Area Array Packaging Handbook, New York, McGraw-Hill, 2002, pp. 18.4-18.11. 2. IPC Committee, IPC-A-600F Acceptability of Printed Boards, Illinois, IPC, 1999, Section 2.9.1 - 2.9.3. 3. IPC Committee, IPC-7095 Design and Assembly Process Implementation for BGAs, Illinois, IPC, 2000. hiEn ly is a senior manufacturing engineer at Jabil Circuit, Inc. and can be reached at Hien_Ly@Jabil.com. JANUARY 2009 PRINTED CIRCUIT DESIGN & FAB

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Printed Circuit Design & Fab - January 2009 Contents Our Line Market Watch Around the World Happenings ROI The Signal Doctor Positive Plating Final Finish Forum Making Sense of Laminate Dielectric Properties Design and Fab Tips for Improving Solder Mask Registration Automating the DDRx Interface Verification Process Printed Circuit Design & Fab Annual Buyers Guide: Special Suppliers Section Printed Circuit Design & Fab Annual Buyers Guide: Guide to Products and Services Off the Shelf Marketplace Ad Index BGA Bulletin

Printed Circuit Design & Fab - January 2009

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