Printed Circuit Design & Fab - November 2007 - (Page 25)

TABLE 3. The effect PCB design and complexity has on firstpass yield and the resulting yielded relative costs of PCBs. TABLE 2. Four tables for calculating the FPY coefficients A and B using Excel. a) PCB part design characteristics for complexity index; b) 10 production runs for PCB parts with electrical yields; c) Excel transformation of yields and complexity index; d) Excel Mulreg results with A & B determined. the resulting mean and standard deviation would reflect the lower yield data but on the “plus” side, you cannot have greater than 100% yield. Thus, the normal mean and standard deviation does introduce some errors that we will ignore for the calculation of the FCC. If you have the ability to calculate and insert a gamma-distribution average, by all means do it. Fabrication Capability been prepared. This is a summary of 10 years of through hole to HDI design and fabrication benchmarking. Each main Structure Column represents a Via Architecture, from through holes to Type I, Type II and Type II HDI stackups. These columns have been further separated into two metrics: Relative Cost Index (RCI) and Density (DEN). Total layers separate the rows. The RCI metric contains real production quotations and prices from around the world for high-volume production. The prices are all normalized to the price of the eight-layer through-hole boards from China. Hence, the relative cost as an index. The DEN metric is the average number of component, connector and test pins (leads) on both sides of the board divided by the board’s length and width. This is the typical number of component pins that that size of board with that number of layers can support. Boards with more power planes or extremely complex BGAs (> 700 pins) may require more layers than represented here. The typical HDI board, when benchmarked, shows a design approach of adding layers for conventional throughhole routing, then moving to the right of the chart in Figure 6 to avoid via starvation. This results in an instant RCI increase of 30% to 40%. The alternative, as described in this paper, can be found along the diagonal dashed line in Figure 6, using HDI to reduce the size of the board and the total layers. This has the effect of reducing the RCI by 30% to 50%. The results of the routing test on the Test Vehicles 2 through 4 verify this observation. The basic truth about PCBs, substrates and hybrid circuits is that design factors have a cumulative effect on manufacturing yield. These factors all affect the ability to produce the product. Specifications may be selected that individually do not adversely affect yields, but cumulatively can dramatically reduce yield and profitability. A simple algorithm is available3 that collects these factors into a single metric called the Complexity Index (CI). It is given in EQUATION 1 below: 2 3 Complexity = (Area)(Holes/unit area) (No. Layers) Index (Min. trace width)(Min. annular ring)(Min. hole dia.) First-Pass Yield The fabrication capability coefficient (FCC) is computed from a fabricator’s electrical test data, the first-pass yield (FPY). This is the yield of production before any repair or rework. PCB yield data is not “normally distributed;” it is a “gamma distribution.” This is only common-sense, as you can have a typically high-yielding board with some bad production runs; NOVEMBER 2007 Where: Area = top area of the substrate to be designed Holes = total number of drilled holes – blind, buried and through Holes/unit area = holes divided by board area Trace width = the minimum trace width Layers = the total number of layers in the substrate Annular ring = ½ the difference between the via land and the hole diameter Hole diameter = finished hole size. There is no standard for the Complexity Index. It is whatever fits your data the best. You need to experiment to find what definition of the CI equation gives the highest r2 value (goodness of fit). FPY is affected primarily by the physical attributes of the board; parametric panels (PCQR2) can quantify these. But random effects also affect FPY-like handling, operator training, equipment maintenance, production shifts and unexpected events. These show up in the high variability of the yield predictions. First-Pass Yield Calculations The FPY equation is derived from the Wiebull probability failure equations4. This equation is of a more general form of the equation typically used to predict ASIC yields by defect PRINTED CIRCUIT DESIGN & FAB 25

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Printed Circuit Design & Fab - November 2007

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