Printed Circuit Design & Fab - November 2007 - (Page 41) METRIC DESIGN TABLE 6. BGA technology chart for 0.8-mm and 1-mm pitch BGA parts. All dimensions in mm. BGA PIN BGA PITCH BALL DIA 0.8 0.8 1 0.5 0.5 0.6 BGA LAND LAND SIZE 0.45 0.45 0.5 VIA PAD SIZE 0.5 0.45 0.5 VIA HOLE SIZE 0.25 0.2 0.25 PLANE TRACE CLEARANCE WIDTH 0.7 0.65 0.7 0.1 0.125 0.1 TRACE/ TRACE SPACE 0.1 0.125 0.1 TRACE/ VIA SPACE 0.125 0.1 0.1 ROUTE GRID 0.1 0.05 0.1 VIA PART PLACE GRID GRID 0.2 0.2 0.5 1 1 0.5 TABLE 7. Good and bad metric snap grids. GOOD METRIC SNAP GRIDS 1 mm 0.5 mm 0.25 mm 0.2 mm 0.125 mm 0.1 mm 0.05 mm BAD METRIC SNAP GRIDS 0.9 mm 0.8 mm 0.7 mm 0.6 mm 0.4 mm 0.3 mm 0.15 mm FIGURE 17. Controlled impedance, single ended traces for a 1mm pitch BGA. 0.125 TRACE WIDTH 0.05 ROUTE GRID Pad Size: 0.55 Hole Size: 0.25 Plane Clearance: 0.75 TABLE 8. Optimal via pad stacks. 0.1 TRACE WIDTH 0.05 ROUTE GRID Pad Size: 0.5 Hole Size: 0.25 Plane Clearance: 0.7 0.1 ROUTE GRID 0.15 TRACE WIDTH Pad Size: 0.65 Hole Size: 0.3 Plane Clearance: 0.8 for 0.4-, 0.5- and 0.65-mm pitch BGA parts when trace routing is done on the same layer as the BGA land. The solder mask defined BGA land is only recommended when traces need to be protected from exposure and to avoid short circuiting with the BGA land. Also, if outer layer routing can be avoided, it’s best to use the “non-solder mask defined” BGA technology to allow the BGA ball to collapse around the land. See FIGURES 11, 12 and 13 for the various solder lands for BGA components. The next group of BGA components is 0.8- and 1.0-mm pitch. These components can fanout to a via placed between the BGA lands. This fanout is the “dog bone fanout” because it looks like a dog bone with nubs on each end. Table 6 lists the via size, hole size, trace width and routing grid for best routing results. FIGURES 14 and 15 illustrate one and two track technology between vias. The IPC-7351A LP Calculator has a BGA via calculator that helps PCB designers accurately calculate the trace width, trace space, via pad, hole size and plane clearance. The plane clearance is extremely important because it removes copper from ground planes. Ground planes are used for return paths for all transmission lines. If the plane clearance encroaches under a trace, the return path will find an alternate route to return to the source. Having clean reference plane return paths produces the fastest and quietest PCBs. By calculating the via hole plane clearance size, the minimum copper-to-hole annular ring can be determined, and this value is derived by the PCB manufacturer. Fewer layers (four to six) and thinner PCB material may have a smaller plane clearance than multilayer (eight to twenty) thick boards. High-speed PCB layouts require layer-to-layer controlled NOVEMBER 2007 impedance. Differential impedance is typically 100 Ω and single-ended transmission line impedance is typically 50 to 60 Ω The primary goal is to keep all the traces on a 0.05 mm routing grid and adjust the trace width accordingly for proper impedance values. FIGURES 16 and 17 illustrate the 0.2-mm trace pitch; 0.05 and 0.1 mm are perfect snap grid solutions for signal routing. You will achieve better routing results when the traces snap to a grid. Metric “snap grids” that produce the best part placement, via fanout and trace routing results should be evenly divisible into 1 mm. TABLE 7 lists good and bad snap grids. There are optimized via pad stacks that go with certain trace/space technologies. TABLE 8 illustrates the optimum via pad stack data for the three most popular trace widths: 0.1, 0.125 and 0.15 mm. Conclusion Using a metric placement and routing grid and metric trace widths are far superior and easier to work with metric pitch BGA components than Imperial unit dimensions. Also, working with a trace route snap grid is much easier to work with rather than using shape-based “gridless” routing solutions. The IPC-7351A CAD library construction uses 0.05 mm as the base unit for all CAD library land size calculation roundoffs. Clean use of metric unit technology throughout the CAD database environment renders the shape-based theory obsolete. When PCB designers finally discover that working with metric units increases performance and overall quality, they will be asking themselves “What took me so long to transition to the metric SI measurement system?” If you complete five PCB layouts using metric units, you will probably never go back to using Imperial units. I guarantee it. PCD&F TOM HAUSHERR is CEO & director of technology, PCB Libraries Inc. He can be reached at Tom.Hausherr@PCBLibraries.com PRINTED CIRCUIT DESIGN & FAB 41
Table of Contents Feed for the Digital Edition of Printed Circuit Design & Fab - November 2007 Printed Circuit Design & Fab - November 2007 Contents Our Line Market Watch Around the World Happenings ROI Packaging HDI Design and Fab Plating Design Tools Metric Design Productronica Product Preview Marketplace Ad Index The Signal Doctor Printed Circuit Design & Fab - November 2007 Printed Circuit Design & Fab - November 2007 - Printed Circuit Design & Fab - November 2007 (Page Cover1) Printed Circuit Design & Fab - November 2007 - Printed Circuit Design & Fab - November 2007 (Page Cover2) Printed Circuit Design & Fab - November 2007 - Printed Circuit Design & Fab - November 2007 (Page 1) Printed Circuit Design & Fab - November 2007 - Contents (Page 2) Printed Circuit Design & Fab - November 2007 - Contents (Page 3) Printed Circuit Design & Fab - November 2007 - Our Line (Page 4) Printed Circuit Design & Fab - November 2007 - Our Line (Page 5) Printed Circuit Design & Fab - November 2007 - Market Watch (Page 6) Printed Circuit Design & Fab - November 2007 - Market Watch (Page 7) Printed Circuit Design & Fab - November 2007 - Around the World (Page 8) Printed Circuit Design & Fab - November 2007 - Around the World (Page 9) Printed Circuit Design & Fab - November 2007 - Around the World (Page 10) Printed Circuit Design & Fab - November 2007 - Around the World (Page 11) Printed Circuit Design & Fab - November 2007 - Happenings (Page 12) Printed Circuit Design & Fab - November 2007 - Happenings (Page 13) Printed Circuit Design & Fab - November 2007 - ROI (Page 14) Printed Circuit Design & Fab - November 2007 - ROI (Page 15) Printed Circuit Design & Fab - November 2007 - Packaging (Page 16) Printed Circuit Design & Fab - November 2007 - Packaging (Page 16A) Printed Circuit Design & Fab - November 2007 - Packaging (Page 16B) Printed Circuit Design & Fab - November 2007 - Packaging (Page 17) Printed Circuit Design & Fab - November 2007 - Packaging (Page 18) Printed Circuit Design & Fab - November 2007 - Packaging (Page 19) Printed Circuit Design & Fab - November 2007 - HDI Design and Fab (Page 20) Printed Circuit Design & Fab - November 2007 - HDI Design and Fab (Page 21) Printed Circuit Design & Fab - November 2007 - HDI Design and Fab (Page 22) Printed Circuit Design & Fab - November 2007 - HDI Design and Fab (Page 23) Printed Circuit Design & Fab - November 2007 - HDI Design and Fab (Page 24) Printed Circuit Design & Fab - November 2007 - HDI Design and Fab (Page 24A) Printed Circuit Design & Fab - November 2007 - HDI Design and Fab (Page 24B) Printed Circuit Design & Fab - November 2007 - HDI Design and Fab (Page 24C) Printed Circuit Design & Fab - November 2007 - HDI Design and Fab (Page 24D) Printed Circuit Design & Fab - November 2007 - HDI Design and Fab (Page 25) Printed Circuit Design & Fab - November 2007 - HDI Design and Fab (Page 26) Printed Circuit Design & Fab - November 2007 - Plating (Page 27) Printed Circuit Design & Fab - November 2007 - Plating (Page 28) Printed Circuit Design & Fab - November 2007 - Plating (Page 29) Printed Circuit Design & Fab - November 2007 - Plating (Page 30) Printed Circuit Design & Fab - November 2007 - Plating (Page 31) Printed Circuit Design & Fab - November 2007 - Design Tools (Page 32) Printed Circuit Design & Fab - November 2007 - Design Tools (Page 33) Printed Circuit Design & Fab - November 2007 - Design Tools (Page 34) Printed Circuit Design & Fab - November 2007 - Design Tools (Page 35) Printed Circuit Design & Fab - November 2007 - Metric Design (Page 36) Printed Circuit Design & Fab - November 2007 - Metric Design (Page 37) Printed Circuit Design & Fab - November 2007 - Metric Design (Page 38) Printed Circuit Design & Fab - November 2007 - Metric Design (Page 39) Printed Circuit Design & Fab - November 2007 - Metric Design (Page 40) Printed Circuit Design & Fab - November 2007 - Metric Design (Page 41) Printed Circuit Design & Fab - November 2007 - Productronica Product Preview (Page 42) Printed Circuit Design & Fab - November 2007 - Productronica Product Preview (Page 43) Printed Circuit Design & Fab - November 2007 - Marketplace (Page 44) Printed Circuit Design & Fab - November 2007 - Marketplace (Page 45) Printed Circuit Design & Fab - November 2007 - Marketplace (Page 46) Printed Circuit Design & Fab - November 2007 - Ad Index (Page 47) Printed Circuit Design & Fab - November 2007 - The Signal Doctor (Page 48) Printed Circuit Design & Fab - November 2007 - The Signal Doctor (Page Cover3) Printed Circuit Design & Fab - November 2007 - The Signal Doctor (Page Cover4)
For optimal viewing of this digital publication, please enable JavaScript and then refresh the page. If you would like to try to load the digital publication without using Flash Player detection, please click here.