Printed Circuit Design & Fab - December 2007 - (Page 25) inadequate, the possibility of voids exists. The main reason is that the lack of texturing will reduce catalyst adsorption, leading to voids. Electroless copper processes require an adequate amount of catalyst on the hole wall to promote the electroless copper deposition. Key questions to ask in the brainstorming session include the following. ■ Is the solvent conditioner (swellant) making sufficient penetration into the resin matrix? And is the solvent system compatible with the resin that you are trying to desmear? It should be noted here that some of the higher Tg resins do not react in the same manner as standard FR-4 and require specialized solvent conditioning. The higher the degree of cross-linking in the polymer resin makes the more difficult it is for the solvent to penetrate and, thus, weaken the polymer-polymer bonds in the resin. In turn, this reduces the action of the permanganate solution in terms of resin removal and texturing. ■ Check the operating temperature of the alkaline permanganate solution, as well as the hydroxide and actual permanganate content. The hydroxide content aids in promoting the aggressiveness of the permanganate attack on the resin. The permanganate in the +7 oxidation state will perform the actual oxidization and breakdown of the resin. Manganate (+4) is a by-product of this reaction and will not participate in the resin oxidation. Manganate residue should be controlled and maintained below 20 to 25 grams/liter. Otherwise, as manganate builds up over time, the rate of resin removal and texturing will diminish. If solvent compatibility and degree of penetration is sufficient, then consider utilizing a higher concentration of permanganate. Sodium permanganate will allow for more actual permanganate in solution over the corresponding potassium salt. ■ Finally, review the neutralizer and glass-etch. A major cause of voiding is due to manganate residues remaining on the hole wall resin and glass. One should frequently renew this solution to ensure fresh working chemistry. Also, check the acid concentration. Lower concentration reduces the effectiveness of the neutralization. Often, to reduce process steps, fabricators will combine the neutralizer and glass etch in the same process tank. (Personally, I prefer separate steps because the process is more effective.) As the glass etch weakens due to continued use, the ability of the glass etch to roughen the glass fibers (referred to as “frosting”) is reduced. This, in turn, reduces the ability of the catalyst to adhere to glass. When this happens, voids can result. PCD&F Ed. note: Part 1 appeared in the October issue. Both parts are available online at pcdandf.com/cms/content/ view/3847/95 MICHAEL CARANO is vice president, marketing and business development Electrochemicals Inc.; mcarano@electrochemicals.com. NOW AVAILABLE IN FOUR SIZES PROVIDING PRECISION VIDEO AND X-RAY BASED MEASUREMENT SYSTEMS TO THE PCB INDUSTRY SINCE 1978 Accuracy (To 3 microns) Speed (Up to 30 inches per second) Resolution (1/10th micron linear scales) Repeatability (Air-bearing X-Y transport) Reliability (Linear motors in X & Y axes) CLICK HERE TO DOWNLOAD DATA SHEET Flexibility (XP based metrology software) OPERATIONS TECHNOLOGY INC DECEMBER 2007 30 Lambert Rd. PO Box 408, Blairstown, NJ 07825 USA Phone: 908-362-6200 www.optek.net PRINTED CIRCUIT DESIGN & FAB 25 http://pcdandf.com/cms/content/view/3847/95 http://pcdandf.com/cms/content/view/3847/95 http://www.optek.net/getPDF.php?url_id=nxtPDF http://www.optek.net http://www.optek.net/load.php?url_id=nxtAd
Table of Contents Feed for the Digital Edition of Printed Circuit Design & Fab - December 2007 Printed Circuit Design & Fab - December 2007 Contents Our Line Market Watch Around the World Happenings ROI 2007 PCB Designer Salary Survey Interconnect Strategies Positive Plating RF Design Ad Index Noise Reduction Supply Chain DfM Off the Shelf Marketplace The Signal Doctor Printed Circuit Design & Fab - December 2007 Printed Circuit Design & Fab - December 2007 - Printed Circuit Design & Fab - December 2007 (Page Cover1) Printed Circuit Design & Fab - December 2007 - Printed Circuit Design & Fab - December 2007 (Page Cover2) Printed Circuit Design & Fab - December 2007 - Printed Circuit Design & Fab - December 2007 (Page 1) Printed Circuit Design & Fab - December 2007 - Contents (Page 2) Printed Circuit Design & Fab - December 2007 - Contents (Page 3) Printed Circuit Design & Fab - December 2007 - Our Line (Page 4) Printed Circuit Design & Fab - December 2007 - Our Line (Page 5) Printed Circuit Design & Fab - December 2007 - Market Watch (Page 6) Printed Circuit Design & Fab - December 2007 - Market Watch (Page 7) Printed Circuit Design & Fab - December 2007 - Market Watch (Page 8) Printed Circuit Design & Fab - December 2007 - Around the World (Page 9) Printed Circuit Design & Fab - December 2007 - Around the World (Page 10) Printed Circuit Design & Fab - December 2007 - Around the World (Page 11) Printed Circuit Design & Fab - December 2007 - Happenings (Page 12) Printed Circuit Design & Fab - December 2007 - Happenings (Page 13) Printed Circuit Design & Fab - December 2007 - ROI (Page 14) Printed Circuit Design & Fab - December 2007 - ROI (Page 15) Printed Circuit Design & Fab - December 2007 - 2007 PCB Designer Salary Survey (Page 16) Printed Circuit Design & Fab - December 2007 - 2007 PCB Designer Salary Survey (Page V1) Printed Circuit Design & Fab - December 2007 - 2007 PCB Designer Salary Survey (Page V2) Printed Circuit Design & Fab - December 2007 - 2007 PCB Designer Salary Survey (Page 17) Printed Circuit Design & Fab - December 2007 - 2007 PCB Designer Salary Survey (Page 18) Printed Circuit Design & Fab - December 2007 - 2007 PCB Designer Salary Survey (Page 19) Printed Circuit Design & Fab - December 2007 - 2007 PCB Designer Salary Survey (Page 20) Printed Circuit Design & Fab - December 2007 - 2007 PCB Designer Salary Survey (Page 21) Printed Circuit Design & Fab - December 2007 - Interconnect Strategies (Page 22) Printed Circuit Design & Fab - December 2007 - Interconnect Strategies (Page 23) Printed Circuit Design & Fab - December 2007 - Positive Plating (Page 24) Printed Circuit Design & Fab - December 2007 - Positive Plating (Page 25) Printed Circuit Design & Fab - December 2007 - RF Design (Page 26) Printed Circuit Design & Fab - December 2007 - RF Design (Page 27) Printed Circuit Design & Fab - December 2007 - Ad Index (Page 28) Printed Circuit Design & Fab - December 2007 - Ad Index (Page 29) Printed Circuit Design & Fab - December 2007 - Ad Index (Page 30) Printed Circuit Design & Fab - December 2007 - Ad Index (Page 31) Printed Circuit Design & Fab - December 2007 - Noise Reduction (Page 32) Printed Circuit Design & Fab - December 2007 - Noise Reduction (Page 33) Printed Circuit Design & Fab - December 2007 - Noise Reduction (Page 34) Printed Circuit Design & Fab - December 2007 - Noise Reduction (Page 35) Printed Circuit Design & Fab - December 2007 - Supply Chain (Page 36) Printed Circuit Design & Fab - December 2007 - Supply Chain (Page 37) Printed Circuit Design & Fab - December 2007 - Supply Chain (Page 38) Printed Circuit Design & Fab - December 2007 - Supply Chain (Page 39) Printed Circuit Design & Fab - December 2007 - DfM (Page 40) Printed Circuit Design & Fab - December 2007 - DfM (Page 41) Printed Circuit Design & Fab - December 2007 - DfM (Page 42) Printed Circuit Design & Fab - December 2007 - Off the Shelf (Page 43) Printed Circuit Design & Fab - December 2007 - Marketplace (Page 44) Printed Circuit Design & Fab - December 2007 - Marketplace (Page 45) Printed Circuit Design & Fab - December 2007 - Marketplace (Page 46) Printed Circuit Design & Fab - December 2007 - Marketplace (Page 47) Printed Circuit Design & Fab - December 2007 - The Signal Doctor (Page 48) Printed Circuit Design & Fab - December 2007 - The Signal Doctor (Page Cover3) Printed Circuit Design & Fab - December 2007 - The Signal Doctor (Page Cover4)
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