Printed Circuit Design & Fab - December 2007 - (Page 43)

MACHINES MATERIALS TOOLS SYSTEMS SOFTWARE SAVINGS PER YEAR Layout Design Team Design Time Costs Hardware Engineering Team Design Time Costs (Source: CircuitSpace User Survey) 18.5 weeks $33,621 1.4 weeks $3,635 RF MULTILAYER CERAMIC CAPACITOR DESIGN ADVANCES FOR LOW- AND ZERO-PROFILE ANTENNAS A new technique accelerates the design of low-profile and zero-profile antennas installed in the earth. Reportedly reduces computer memory requirements and cuts simulation times from days to an hour or two. Previously, these antennae were modeled to at least three times the skin depth of the wave to allow space and time for the ground wave to be differentiated from the fields that propagate into the earth, which are ultimately dissipated in the dielectric losses. Said to save time because it can calculate all frequencies simultaneously. WHO: MegaWave Corp. and Flomerics WEB: microstripes.com The capacitor is 10 mm square, type 106, offers high capacitance and performance in a small unit volume and provides reliable operation for a variety of high RF voltage and high RF current applications. The multilayer capacitors are constructed from very low-loss modified magnesium titanate ceramic and internal electrodes, which, when sintered under controlled conditions, form a monolithic and hermetically sealed device. Available in a variety of end-termination styles, including a completely non-magnetic option, which allows distortion-free use with highTesla magnetic fields, and a nickel-barrier end termination for reflow soldering and surface mounting. WHO: Morgan Electro Ceramics WEB: morganelectroceramics.com FREE ROI CALCULATOR The free CircuitSpace ROI calculator reportedly helps quantify time and cost benefits. Customers are said to have achieved up to 5x returns on their investment within the first year. Through a patented approach, CircuitSpace breaks down the current ”click and drag” placement and accelerates the design process. Said to seamlessly integrate with Cadence Allegro or OrCAD PCB Editor and allow users to achieve board layouts in a fraction of the time it would take to complete by hand. WHO: DesignAdvance, EMA Design Automation WEB: designadvance.com, ema-eda.com/roi OTHERS OF NOTE INTEGRATED FPGA DESIGN/PCB LAYOUT Cadstar FPGA combines the Active-HDL Lite verification tool and the desktop PCB design suite. Performs mixed language simulation for FPGAs. Is structured on integration of FPGA design within the PCB layout. Uses Design Flow Manager. Said to provide one universal project manager that controls all design files for simulation, synthesis, place and route, and pin assignment to the PCB. Supports I/O synchronization. WHO: Zuken Ltd. and Aldec Inc. WEB: zuken.com, aldec.com ACCELERATED DESIGNS Ultra Librarian Reader provides schematic symbols and PCB footprints for products including PowerWise. Is delivered in a CAD format. Is free and is said to generate components and attributes in any EDA CAD/CAE format. Footprints and symbols are available for download at national.com/cad/. Is based on IPC-7351 specification. Enhanced version is available for purchase; enables software models to be modified and auto-generated to meet user-defined requirements. WHO: Accelerated Designs Inc. WEB: accelerated-designs.com IPC-7351 FOR McCAD PCB Libraries offers McCAD users reduced design time, higher accuracy, and compliance with IPC-7351, Generic Requirements for Surface Mount Design and Land Pattern Standard, which replaces IPC-SM-782 and represents a change in the way land patterns are defined, developed and categorized. LP Wizard for McCAD is said to reduce the time it takes to build library parts and ensures compatibility with the IPC standard for surface-mount CAD library construction. WHO: PCB Libraries WEB: PCBLibraries.com/McCAD A5-A PROBE SYSTEM The A5-A probe system automated test platform offers flexible loading and uploading, with a sensitive handling function. Incorporates four high-res CCD cameras for optical scanning. Reportedly automatically separates good and bad boards in a cycle time of less than 15 sec. Handles 100 x 72 mm to 610 x 460 mm board sizes. Minimum thickness is 0.8 mm (320 x 250 mm board size) and 0.6 mm (320 x 250 mm and smaller board size), with a maximum of 4 mm. WHO: ATG/LM WEB: atg-test-systems.de FLEX SILICONE CONFORMAL COATING Flexible silicone conformal coating is said to be fast drying and designed to protect PCBs exposed to high-humidity environments. Is available in 400 ml aerosol and a 5-l bulk container. Adheres to a variety of substrates and fluoresces under UV light for ease of inspection. Has an operating temperature ranging from -50˚ to +125˚C. Reportedly is dry to touch at 20˚C in 10 to 15 min. Contains no isocyanates. WHO: Electrolube WEB: electrolube.com FREE FPGA SIMULATION KITS A free simulation design kit for Xilinx Virtex-5 FPGA is said to deliver signal integrity for 65 nm FPGA designs. Is for CR-5000 Lightning and provides a set of topology templates, incontext HTML documentation and content for simulation of waveforms and eye patterns, etc. Templates are ready-to-use. LXT and SXT platforms offer 3.2 Gbps low-power transceivers with built-in PCI Express endpoint and tri-mode Ethernet MAC blocks. WHO: Zuken WEB: zuken.com DECEMBER 2007 PRINTED CIRCUIT DESIGN & FAB 43 http://microstripes.com http://morganelectroceramics.com http://ema-eda.com/roi http://designadvance.com http://national.com/cad/ http://aldec.com http://zuken.com http://accelerated-designs.com http://PCBLibraries.com/McCAD http://electrolube.com http://atg-test-systems.de http://zuken.com

Table of Contents Feed for the Digital Edition of Printed Circuit Design & Fab - December 2007

Printed Circuit Design & Fab - December 2007 Contents Our Line Market Watch Around the World Happenings ROI 2007 PCB Designer Salary Survey Interconnect Strategies Positive Plating RF Design Ad Index Noise Reduction Supply Chain DfM Off the Shelf Marketplace The Signal Doctor

Printed Circuit Design & Fab - December 2007

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