Printed Circuit Design & Fab - February 2008 - (Page 24)

MODELING SPICE MODELING from an EM Simulation Environment The use of full-wave electromagnetic modeling can simulate the behavior of a high-speed differential backplane channel and advance the systemlevel design process. by EUGENE MAYEVSKYI AND FABRIZIO ZANELLA The operating frequency of high-speed copper backplane serial links is expected to reach 10 Gbps in the next few years. At a 10 Gbps data rate, the clock frequency is 5 GHz, equating to a period of 200 ps, which results in a signal rise time in the range of 30 to 50 ps. This rise time will influence the analog bandwidth and the highest significant frequency component both for the measurement bandwidth and the bandwidth of the channel model. To effectively design a serial link (channel) to operate effectively at this bandwidth, accurate signal integrity modeling is required. A full wave electromagnetic (EM) simulator is used to create models of the various components (transmission lines, connectors, vias) on a high-speed serial channel. These models are then verified with laboratory measurements on a test vehicle containing backplane to daughtercard links. The link contains two high- speed digital connectors, two modules and a backplane. The frequency of operation is 0 to 10 GHz. Three-dimensional EM models are created for all the link components. The EM simulator provides S-parameters and time domain data, which can later be compared to laboratory measurements. Time Domain Reflectometry (TDR) is used to measure the channel, and a software tool provided by the TDR manufacturer is used. This tool enhances the TDR capabilities, improves measurement accuracy and creates S-parameter data from time domain measurements. This tool also allows a designer to create SPICE models of the link components, based on the measured data. The SPICE model results can then be verified by comparing it to the measured data, and the final model assembly can be used to predict the overall system response in the circuit simulation environment. In this paper, we will present the major stages for modeling the gigabit backplane structure used in the system-level design process. We will start from the description of the interconnect structure followed by the full-wave EM simulation of the design. The results of this simulation will be compared with the measurement data of the prototype. Finally, a topological circuit model created from the measurements will be used to predict data transmission through the backplane in terms of an eye diagram. Electromagnetic Modeling of the Channel The channel chosen for this analysis consists of two test modules, a backplane and a high-speed connector. The connector is the 10-row FCI AirMax connector. The commercial CST Studio Suite 2006BTM software is used for the simulations of the channel, at a frequency range of 0 to 10 GHz. CST Microwave Studio, a full-wave 3D EM modeler, which uses the Finite Integration Technique (FIT), is used to model FIGURE 1. FCI AirMax connector microwave studio model, 40 ports. 24 FIGURE 2. Design Studio schematic of the channel: from left to right are the Tx module; AirMax connector; backplane; Airmax connector; and Rx module. FIGURE 3. Empirical data correlation to EM modeling of channel S21. FEBRUARY 2008 PRINTED CIRCUIT DESIGN & FAB

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Printed Circuit Design & Fab - February 2008

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