Printed Circuit Design & Fab - March 2008 - (Page 20)

FPGA/PCB CO-DESIGN FPGA/PCB CO-DESIGN Increases Fabrication Yields When integrating FPGAs into PCB design every signal and pin has a measureable effect on production yield. by YAN KILLY PCB designs with field-programmable gate arrays (FPGAs) are often done more empirically than systematically – the board is designed and then “tweaked” by altering component placement, component orientation, PCB layer stack up, PBC signal layer pairs, trace routing, and even manufacturing materials. As FPGAs have become a more dominant design component, the concept that the FPGA pinout can be optimized for both internal and external FPGA signal integrity (in PCB design) provides a flexibility not available with competing technologies. Taking advantage of that flexibility throughout the design process can measurably increase PCB yields and increase profit. Incorporating FPGA/PCB co-design and paying special attention to FPGA placement and routing can reduce “tweaking” time by 20-50%, increase fabrication yields, and ultimately increase the end-product’s profitability. FPGA Device Libraries Load/Save Design FPGA Devices Dominate New Designs A decade ago, ASICs were the dominant definable component found in design starts. Today the flexibility, rapid deployment, and lower development costs of FPGAs have resulted in the dramatic increase of their use in new designs. As FPGAs have matured as circuit elements, pin count has risen significantly. The increase in pin count represents a factorial-increased complexity to the PCB design. This complexity increases with greater numbers of traces, vias and tighter tolerances, plus signal integrity and timing constraint issues. The increased pin count also creates the need for additional layers as well, each adding 10-20% to the manufacturing cost of a completed board. FPGA Flow PCB Flow HDL Design VHDL or Verilog Functional Symbol Simulation I/O Designer Schematic Entry Typical Design Flow Having evolved from different technology arenas, PCB and FPGA designs have some differences in design flows that have hindered many co-design efforts and negatively impacted the optimization of the FPGA-PCB interface. PCB designs use a schematic-based data entry method. FPGAs, however, are defined by a language-based description. This difference in methodologies coupled with human interface issues has been at the root of most problems. In a typical design, the FPGA team defines high-level block diagrams comprising the system design. At this point, MARCH 2008 Synthesis Constraints PCB Symbol & Schematic FPGA Place & Route Tools P&R Constraints P&R Pin Map PCB Layout FIGURE 1. Integrating an I/O designer tool, PCB design is pushed up the design cycle. 20 PRINTED CIRCUIT DESIGN & FAB

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Printed Circuit Design & Fab - March 2008 Contents Our Line Market Watch Around the World Happenings ROI EMC for the Real World Positive Plating FPGA/PCB Co-design Increases Fabrication Yields Optoelectronics Comes of Age, Part 2 Implementation of Buried Capacitance in High-Speed Designs Ad Index Improved Innerlayer Bonding for Sequential Lamination Off the Shelf Marketplace BGA Bulletin

Printed Circuit Design & Fab - March 2008

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